M34E02-F EEPROM, Serial, SPD for DRAM Modules

The M34E02 and M34E02-F are 2 Kbit serial EEPROM memories able to lock permanently the data in its first half (from location 00h to 7Fh). This facility has been designed specifically for use in DRAM DIMMs (dual interline memory modules) with serial presence detect (SPD). All the information concerning the DDR1 or DDR2 configuration of the DRAM module (such as its access speed, size and organization) can be kept write-protected in the first half of the memory.

The first half of the memory area can be write-protected using two different software write protection mechanisms. By sending the device a specific sequence, the first 128 bytes of the memory become write protected: permanently or resettable. In addition, the devices allow the entire memory area to be write protected, using the WCinput (for example by tieing this input to VCC).

These I²C-compatible electrically erasable programmable memory (EEPROM) devices are organized as 256 × 8 bits.

I²C uses a two wire serial interface, comprising a bi-directional data line and a clock line. The devices carry a built-in 4-bit device type identifier code (1010) in accordance with the I²C bus definition to access the memory area and a second device type identifier code (0110) to define the protection. These codes are used together with the voltage level applied on the three chip enable inputs (E2, E1, E0).

The devices behave as a slave device in the I²C protocol, with all memory operations synchronized by the serial clock. Read and Write operations are initiated by a Start condition, generated by the bus master. The Start condition is followed by a device select code and RWbit (as described in the Device select code table), terminated by an acknowledge bit.

When writing data to the memory, the memory inserts an acknowledge bit during the 9th bit time, following the bus master’s 8-bit transmission. When data is read by the bus master, the bus master acknowledges the receipt of the data byte in the same way. Data transfers are terminated by a Stop condition after an Ack for WRITE, and after a NoAck for READ

技术特性
M34E02-F 订购信息
订购型号 产品状态 美金价格 数量 封装 包装形式 温度范围 材料声明
M34E02-FMC6TG Active 1.89 1000 UFDFPN 8 2x3x0.6 Tape And Reel -40 °C-85 °C M34E02-FMC6TG
M34E02-FDW6TP Active 1.36 1000 TSSOP8 Tape And Reel -40 °C-85 °C M34E02-FDW6TP
DATASHEET
描述 版本 大小
M34E02-F : DS3806: 2 Kbit serial presence detect (SPD) EEPROM for double data rate (DDR1 and DDR2) DRAM modules 11 370KB
APPLICATION NOTES
描述 版本 大小
AN1782: STR71x I²C communication with M24Cxx EEPROM 2 55KB
AN2014: How a designer can make the most of STMicroelectronics Serial EEPROMs 8 645KB
PRODUCT PRESENTATIONS
描述 版本 大小
2-Mbit serial EEPROM product overview 1.0 91KB