STLVD111B Programmable low voltage 1:10 differential LVDS clock driver

The STLVD111 is a low skew programmable 1 to 10 differential LVDS driver, designed for clock distribution. The select signal is fanned out to 10 identical differential outputs.

The STLVD111 is provided with a 11 bit shift register with a serial in and a Control Register. The purpose is to enable or power off each output clock channel and to select the clock input. The STLVD111 is specifically designed, modelled and produced with low skew as the key goal. Optimal design and layout serve to minimize gate to gate skew within a device. The net result is a dependable guaranteed low skew device.

The STLVD111 can be used for high performance clock distribution in 2.5V systems with LVDS levels. Designers can take advantage of the device’s performance to distribute low skew clocks across the backplane or the board.

技术特性

100ps part-to part skew
50ps bank skew
Differential design
Meets LVDS spec. for driver outputs and receiver inputs
Reference voltage available output VBB
Low voltage VCC range of 2.375V to 2.625V
High signalling rate capability (exceeds 622MHz)
Support open, short and terminated input fail-safe (low output state)
Programmable drivers power off control

STLVD111B 订购信息

订购型号	产品状态	美金价格	数量	封装	包装形式	温度范围	材料声明
STLVD111BFR	Active	22.316	1000	LQFP 32 7x7x1.4	Tape And Reel	-40 °C-85 °C	STLVD111BFR

DATASHEET

下载	描述	版本	大小
STLVD111B	Programmable low voltage 1:10 differential LVDS clock driver	8	286KB