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DAC5681 16 位 1.0GSPS 数模转换器 (DAC)

DAC5681 同类产品

• CDCM7005 - Recommended clocking solution, providing low jitter clock outputs to maximize converter performance

	DAC5681	DAC5681Z	DAC5682Z
Resolution(Bits)	16	16	16
DAC: Channels	1	1	2
Settling Time(µs)	0.0104	0.0104	0.0104
Sample / Update Rate(MSPS)	1000	1000	1000
Interface	Parallel LVDS	Parallel LVDS	Parallel LVDS
Output Type	Current	Current	Current
Output Range Min.(V or mA)	2	2	2
Output Range Max.(V or mA)	20	20	20
Single/Dual Analog Supply	Single	Single	Single
DNL(Max)(+/-LSB)	2	2	2
INL(Max)(+/-LSB)	4	4	4
SNR(Typ)(dB)	79	79	79
SFDR(Typ)(dB)	81	81	81
Power Consumption(Typ)(mW)	650	800	1300
Architecture	I-steering	I-steering	I-steering
Reference: Type	Int	Int	Int
Analog Voltage AV/DD(Min)(V)	3.0	3.0	3.0
Analog Voltage AV/DD(Max)(V)	3.6	3.6	3.6
Logic Voltage DV/DD(Min)(V)	1.71	1.71	1.71
Logic Voltage DV/DD(Max)(V)	2.15	2.15	2.15
No. of Supplies (Unipolar)	2	2	2
Rating	Catalog	Catalog	Catalog
Pin/Package	64VQFN	64VQFN	64VQFN
Approx. Price (US$)	34.40 | 100u	38.70 | 100u	39.95 | 100u
Thermal Shutdown	No	No	No
Operating Temperature Range(°C)	-40 to 85	-40 to 85	-40 to 85

DAC5681 说明

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.

DESCRIPTION

The DAC5681 is a 16-bit 1.0 GSPS digital-to-analog converter (DAC) with wideband LVDS data input and internal voltage reference. The DAC5681 offers superior linearity and noise performance.

The DAC5681 integrates a wideband LVDS port with on-chip termination, providing full 1.0 GSPS data transfer into the DAC and lower EMI than traditional CMOS data interfaces. An on-chip delay lock loop (DLL) simplifies LVDS interfacing by providing skew control for the LVDS input data clock.

The current-steering architecture of the DAC5681 consists of a segmented array of current sinking switches directing up to 20mA of full-scale current to complementary output nodes. An accurate on-chip voltage reference is temperature-compensated and delivers a stable 1.2-V reference voltage. Optionally, an external reference may be used.

The DAC5681 is characterized for operation overthe industrial temperature range of –40°C to 85°C

DAC5681 特性

• 16-Bit Digital-to-Analog Converter (DAC)
• 1.0 GSPS Update Rate
• 16-Bit Wideband Input LVDS Data Bus
  • 8 Sample Input FIFO
  • On-Chip Delay Lock Loop
• High Performance
  • 73 dBc ACLR WCDMA TM1 at 180 MHz
• On Chip 1.2 V Reference
• Differential Scalable Output: 2 to 20 mA
• Package: 64-Pin 9 × 9 mm QFN
• APPLICATIONS
  • Cellular Base Stations
  • Broadband Wireless Access (BWA)
  • WiMAX 802.16
  • Fixed Wireless Backhaul
  • Cable Modem Termination System (CMTS)
  • Medical / Test Instrumentation
  • Radar Systems

DAC5681 芯片订购指南

器件	状态	温度 (oC)	价格（美元）	封装 | 引脚	封装数量 | 封装载体	丝印标记
DAC5681IRGC25	ACTIVE	-40 to 85	40.65 | 100u	VQFN (RGC) | 64	25	DAC5681I
DAC5681IRGCR	ACTIVE	-40 to 85	34.40 | 100u	VQFN (RGC) | 64	2000 | LARGE T&R	DAC5681I
DAC5681IRGCT	ACTIVE	-40 to 85	34.40 | 100u	VQFN (RGC) | 64	250 | SMALL T&R	DAC5681I

DAC5681 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
DAC5681IRGC25	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		DAC5681IRGC25
DAC5681IRGCR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		DAC5681IRGCR
DAC5681IRGCT	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		DAC5681IRGCT

DAC5681 应用技术支持与电子电路设计开发资源下载

1. DAC5681 数据资料 dataSheet 下载.PDF
2. TI 德州仪器仪DAC 模数转换器产品选型与价格 . xls
3. 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
4. 所选封装材料的热学和电学性质 (PDF 645 KB)
5. 高速数据转换 (PDF 1967 KB)
6. Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
7. Analog-to-Digital Converter Grounding Practices Affect System Performance (PDF 56 KB)
8. Principles of Data Acquisition and Conversion (PDF 50 KB)
9. Interleaving Analog-to-Digital Converters (PDF 64 KB)
10. What Designers Should Know About Data Converter Drift (PDF 95 KB)
11. Giving Delta-Sigma Converters a Gain Boost with a Front End Analog Gain Stage (PDF 70 KB)
12. Programming Tricks for Higher Conversion Speeds Utilizing Delta Sigma Converters (PDF 105 KB)

DAC5681 工具

说明	型号	公司
TSW3070 High Speed DAC with Amplifiers Demonstration Kit	TSW3070EVM	Texas Instruments

DAC5681 工具与软件

名称	型号	公司	工具/软件类型
DAC5681 评估模块	DAC5681EVM	Texas Instruments	开发电路板/EVM
DAC5681Z 评估模块	DAC5681ZEVM	Texas Instruments	开发电路板/EVM
DAC5682Z 评估模块	DAC5682ZEVM	Texas Instruments	开发电路板/EVM
GC5325 系统评估套件	GC5325SEK	Texas Instruments	开发电路板/EVM
TRF3703-17 评估模块	TRF3703-17EVM	Texas Instruments	开发电路板/EVM
TSW3100 图形发生器模块	TSW3100EVM	Texas Instruments	开发电路板/EVM