ATF22LV10C
| Key | Value |
|---|
| Operating Voltage (Vcc): | 3.3 |
|---|
| I/O Pins: | 24/28 |
|---|
| Commercial tpd: | 10/15 |
|---|
| Macrocells: | 10 |
|---|
| Power Options: | STANDARD |
|---|
| Registers: | 10 |
|---|
| Usable Gates: | 350 |
|---|
A high-performance electrically erasable CMOS programmable logic device (PLD) with proven Atmel electrically erasable flash memory. Offers The device supports speeds down to 10ns and power dissipation as low as 10TmA. All speed ranges are specified over the 3.0V to 5.5V range for industrial and commercial temperature ranges. The device provides a low-voltage and user-controlled "zero" power CMOS PLD solution. A user-controlled power-down feature offers 10µA (typical) standby power, so designers can manage total system power to meet specific application requirements and enhance reliability, all without sacrificing speed. For edge-sensing 3µA (typical) standby power, as well as low voltage operation, see the Atmel ATF22LV10CQZ.
Ordering Code 订购信息| 订购码 | 封装 | 操作范围 | 载体类型 |
|---|
| ATF22LV10C-10JU | PLCC 28J 28 | Industrial (A) (-40°C to 85°C) | |
| ATF22LV10C-10XU | TSSOP 24X 24 | Industrial (A) (-40°C to 85°C) | |
| ATF22LV10C-10PU | PDIP 24P3 24 | Industrial (A) (-40°C to 85°C) | |
| ATF22LV10C-10SU | | Industrial (A) (-40°C to 85°C) | |
DataSheet 数据手册
Application Note
- Atmel PLD Architectures Simplify Timing Calculations(4 页数, 更新时间: 08/1999)
- Atmel PLD Design Guidelines(12 页数, 更新时间: 09/2000)
- Programming of Atmel PLDs(文件大小: 184KB, 4 页数, 修订版 A, 更新时间: 08/2015)
- Saving Power with Atmel PLDs(7 页数, 更新时间: 09/2000)
- Selecting Decoupling Capacitors for Atmel PLDs(4 页数, 更新时间: 09/1999)
- Tips on Using Test Vectors for Atmel PLDs(20 页数, 更新时间: 09/1999)
- Using Programmable Logic Devices(4 页数, 更新时间: 09/1999)
- Using the Programmable Polarity Control(7 页数, 更新时间: 08/1999)
Qualification
White Paper
