dsPIC30F Motor Control Digital Signal Controller
Seamless migration options from this device to dsPIC33F and PIC24 devices in similar packages.
技术参数参数 | 值 | Architecture | 16-bit | CPU Speed (MIPS) | 30 | Memory Type | Flash | Program Memory (KB) | 48 | RAM Bytes | 2,048 | Temperature Range C | -40 to 125 | Operating Voltage Range (V) | 2.5 to 5.5 | I/O Pins | 20 | Pin Count | 28 | System Management Features | BOR, LVD | POR | Yes | WDT | Yes | Internal Oscillator | 7.37 MHz, 512 kHz | nanoWatt Features | Fast Wake/Fast Control | Digital Communication Peripherals | 1-UART1-SPI1-I2C | Analog Peripherals | 1-A/D 6x10-bit @ 1000(ksps) | CAN (#, type) | 1 CAN | Capture/Compare/PWM Peripherals | 4/2 | PWM Resolution bits | 16 | Motor Control PWM Channels | 6 | Quadrature Encoder Interface (QEI) | 1 | Timers | 5 x 16-bit 2 x 32-bit | Parallel Port | GPIO |
Emulators & DebuggersDemo & Eval BoardsProgrammerSoftware & Compilers | High-Performance Modified RISC CPU: - Modified Harvard architecture
- C compiler optimized instruction set architecture
- 84 base instructions with flexible addressing modes
- 24-bit wide instructions, 16-bit wide data path
- 16 x 16-bit working register array
- Up to 30 MIPs operation:
- DC to 40 MHz external clock input
- 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)
- Peripheral and External interrupt sources
- 8 user selectable priority levels for each interrupt
- 4 processor exceptions and software traps
- Primary and Alternate interrupt Vector Tables
DSP Engine Features: - Modulo and Bit-Reversed Addressing modes
- Two, 40-bit wide accumulators with optional saturation logic
- 17-bit x 17-bit single cycle hardware fractional/ integer multiplier
- Single cycle Multiply-Accumulate (MAC) operation
- 40-stage Barrel Shifter
- Dual data fetch
Peripheral Features: - High current sink/source I/O pins: 25 mA/25 mA
- Optionally pair up 16-bit timers into 32-bit timer modules
- 3-wire SPI™ modules (supports 4 Frame modes)
- I2C™ module supports Multi-Master/Slave mode and 7-bit/10-bit addressing
- Addressable UART modules with FIFO buffers
Motor Control PWM Module Features: - Complementary or Independent Output modes
- Edge and Center Aligned modes
- Multiple duty cycle generators
- Dedicated time base with 4 modes
- Programmable output polarity
- Dead time control for Complementary mode
- Manual output control
- Trigger for synchronized A/D conversions
Quadrature Encoder Interface Module Features: - Phase A, Phase B and Index Pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Counter mode
- Interrupt on position counter rollover/underflow
Analog Features: - 10-bit 1 Msps Analog-to-Digital Converter (A/D)
- A/D Conversion available during Sleep and Idle
- 4 Sample/Hold Channels
- Multiple Conversion Sequencing Options
Special Microcontroller Features: - Enhanced Flash program memory:
- 10,000 erase/write cycle (min.) for industrial temperature range, 100K (typical)
- Data EEPROM memory:
- 100,000 erase/write cycle (min.) for industrial temperature range, 1M (typical)
- Self-reprogrammable under software control
- Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
- Flexible Watchdog Timer (WDT) with on-chip low power RC oscillator for reliable operation
- Fail-Safe clock monitor operation
- Detects clock failure and switches to on-chip low power RC oscillator
- Programmable code protection
- In-Circuit Serial Programming™ (ICSP™)
- Programmable Brown-out Detection and Reset generation
- Selectable Power Management modes
- Sleep, Idle and Alternate Clock modes
CMOS Technology: - Low power, high speed Flash technology
- Wide operating voltage range (2.5V to 5.5V)
- Industrial and Extended temperature ranges
- Low power consumption
|