74AHC1G07GW: 缓冲器，带开漏输出 _ BDTIC 中国领先电子元器件代理商

74AHC1G07GW: 缓冲器，带开漏输出

74AHC1G07和74AHCT1G07是高速硅栅CMOS器件。它们提供一个非反相缓冲器。

该类器件的输出为开漏且可以连接到其它开漏输出以实施低电平有效有线OR或高电平有效有线AND功能。对于数字操作，该器件必须具有一个上拉电阻以建立一个逻辑高电平。

AHC器件具有CMOS输入切换电平和2 V至5.5 V的电源电压范围。

AHCT器件具有TTL输入切换电平和4.5 V至5.5 V的电源电压范围。

74AHC1G07GW: 产品结构框图

74AHC1G07GW: 应用结构框图

Outline 3d SOT353-1

数据手册 (1)

名称/描述	Modified Date
Buffer with open-drain output (REV 7.0) PDF (135.0 kB) 74AHC_AHCT1G07 [English]	22 Jun 2016

应用说明 (6)

名称/描述	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]	04 Nov 2011
PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English]	30 Oct 2002

手册 (2)

名称/描述	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

封装信息 (1)

名称/描述	Modified Date
plastic thin shrink small outline package; 5 leads; body width 1.25 mm (REV 1.0) PDF (223.0 kB) SOT353-1 [English]	08 Feb 2016

包装 (2)

名称/描述	Modified Date
TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... (REV 1.0) PDF (257.0 kB) SOT353-1_125 [English]	15 May 2013
TSSOP5; Reel pack; SMD; Q3 Reverse product orientation; Orderable part number ending, 165 or Z; Ordering code (12NC)... (REV 1.0) PDF (253.0 kB) SOT353-1_165 [English]	15 May 2013

支持信息 (1)

名称/描述	Modified Date
MAR_SOT353 Topmark (REV 1.0) PDF (103.0 kB) MAR_SOT353 [English]	03 Jun 2013

IBIS

ahc1g07 IBIS model (REV 1.0) ibs AHC1G07 4/7/2013

订购信息

型号	状态	Family	V_CC (V)	功能	Logic switching levels	说明	Package version	Output drive capability (mA)	f_max (MHz)	No of bits	t_pd (ns)	Power dissipation considerations	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74AHC1G07GW	Active	AHC(T)	2.0 - 5.5	Buffers/inverters/drivers	CMOS	open-drain	SOT353-1	8	60	1	2.5	low	-40~125	322	90.7	191	TSSOP5	5
74AHC1G07GW/G	No Longer Manufactured		2.0 - 5.5		CMOS			8	60	1		low	-40~125	322	90.7	191	TSSOP5

封装环保信息

产品编号	封装说明	Outline Version	回流/波峰焊接	包装	产品状态	部件编号订购码 (12NC)	Marking	化学成分	RoHS / 无铅 / RHF	无铅转换日期	EFR	IFR(FIT)	MTBF（小时）	MSL	MSL LF
74AHC1G07GW		SOT353-1		Reel 7" Q3/T4, Reverse	Active	74AHC1G07GW,125 (9352 674 70125)	AS	74AHC1G07GW		week 36, 2003	84.9	6.62	1.51E8	1	1

Buffer with open-drain output 74AHC1G07GW

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100

PicoGate Logic footprints NX3L4684

電圧レベルシフタ 74AVC16245DGG-Q100

Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100

Reel 13" Q3/T4 in LargePack, Reverse 74AHCT1G86GW

MAR_SOT353 Topmark 74LVC1G17_Q100

ahc1g07 IBIS model 74AHC1G07GW

plastic thin shrink small outline package; 5 leads; body width 1.25 mm 74LVC1G17_Q100

TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... 74LVC1G17_Q100

74AHC_T_1G07

74HC_T_3G07

XC7SH14

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