74AHC1G09GW: 2输入与门，带开漏输出
74AHC1G09是高速硅栅CMOS器件。
74AHC1G09提供带开漏输出的2输入与功能。
74AHC1G09的输出为开漏且可以连接到其它开漏输出以实施低电平有效有线OR或高电平有效有线AND功能。对于数字操作，该器件必须具有一个上拉电阻以建立一个逻辑高电平。
74AHC1G09GW: 产品结构框图
Outline 3d SOT353-1
数据手册 (1)
| 名称/描述 | Modified Date |
|---|---|
| 2-input AND gate with open-drain output (REV 2.0) PDF (67.0 kB) 74AHC1G09 [English] | 18 Dec 2007 |
应用说明 (6)
| 名称/描述 | Modified Date |
|---|---|
| Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English] | 13 Mar 2013 |
| Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English] | 13 Mar 2013 |
| Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English] | 13 Mar 2013 |
| Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English] | 13 Mar 2013 |
| Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English] | 04 Nov 2011 |
| PicoGate Logic footprints (REV 1.0) PDF (87.0 kB) AN10161 [English] | 30 Oct 2002 |
手册 (2)
| 名称/描述 | Modified Date |
|---|---|
| 電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English] | 16 Feb 2015 |
| Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English] | 20 May 2014 |
封装信息 (1)
| 名称/描述 | Modified Date |
|---|---|
| plastic thin shrink small outline package; 5 leads; body width 1.25 mm (REV 1.0) PDF (223.0 kB) SOT353-1 [English] | 08 Feb 2016 |
包装 (1)
| 名称/描述 | Modified Date |
|---|---|
| TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... (REV 1.0) PDF (257.0 kB) SOT353-1_125 [English] | 15 May 2013 |
支持信息 (1)
| 名称/描述 | Modified Date |
|---|---|
| MAR_SOT353 Topmark (REV 1.0) PDF (103.0 kB) MAR_SOT353 [English] | 03 Jun 2013 |
订购信息
| 型号 | 状态 | Family | 功能 | VCC (V) | 类型 | Logic switching levels | 说明 | Package version | Output drive capability (mA) | tpd (ns) | fmax (MHz) | No of bits | Power dissipation considerations | Tamb (Cel) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | No of pins |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC1G09GW | Active | AHC(T) | AND gates | 2.0 - 5.5 | AND gates | CMOS | open-drain | SOT353-1 | +/- 8 | 3.2 | 60 | 1 | low | -40~125 | 312 | 82.5 | 183 | TSSOP5 | 5 |
封装环保信息
| 产品编号 | 封装说明 | Outline Version | 回流/波峰焊接 | 包装 | 产品状态 | 部件编号订购码 (12NC) | Marking | 化学成分 | RoHS / 无铅 / RHF | 无铅转换日期 | EFR | IFR(FIT) | MTBF（小时） | MSL | MSL LF |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AHC1G09GW | | SOT353-1 | Reel 7" Q3/T4, Reverse | Active | 74AHC1G09GW,125 (9352 799 14125) | A9 | 74AHC1G09GW |    | Always Pb-free | 84.9 | 6.62 | 1.51E8 | 1 | 1 |
- 2-input AND gate with open-drain output 74AHC1G09GW
- Sorting through the low voltage logic maze 74LVC_H_245A_Q100
- Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
- Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100
- Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
- Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100
- PicoGate Logic footprints NX3L4684
- 電圧レベルシフタ 74AVC16245DGG-Q100
- Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
- MAR_SOT353 Topmark 74LVC1G17_Q100
- plastic thin shrink small outline package; 5 leads; body width 1.25 mm 74LVC1G17_Q100
- TSSOP5; Reel pack; SMD, 7"; Q3 Reversed product orientation; Orderable part number ending, 125 or H; Ordering code... 74LVC1G17_Q100
- 74AUP1G09
- XC7SH14
