74AHCT126PW: 四路缓冲器/线路驱动器；3态 _ BDTIC 中国领先电子元器件代理商

74AHCT126PW: 四路缓冲器/线路驱动器；3态

74AHC126；74AHCT126是高速硅栅CMOS器件，与低功耗肖特基TTL (LSTTL)针脚兼容。该类器件的规格符合JEDEC标准No. 7-A。

74AHC126；74AHCT126提供四个带3态输出的非反相缓冲器/线路驱动器。3态输出(nY)通过输出使能输入(nOE)控制。针脚nOE处的低电平使输出呈高阻抗关断状态。

74AHC126；74AHCT126等同于74AHC125；74AHCT125，但具有高电平有效输出使能输入。

74AHCT126PW: 产品结构框图

Outline 3d SOT402-1

数据手册 (1)

名称/描述	Modified Date
Quad buffer/line driver; 3-state (REV 4.0) PDF (92.0 kB) 74AHC_AHCT126 [English]	15 Feb 2010

应用说明 (5)

名称/描述	Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]	13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]	13 Mar 2013
Ground and VCC Bounce of High-Speed Integrated Circuits (REV 1.0) PDF (25.0 kB) AN223 [English]	13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]	13 Mar 2013
Pin FMEA for AHC/AHCT family (REV 1.0) PDF (52.0 kB) AN11106 [English]	04 Nov 2011

手册 (2)

名称/描述	Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]	16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]	20 May 2014

选型工具指南 (2)

名称/描述	Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]	19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]	08 Jan 2015

封装信息 (1)

名称/描述	Modified Date
plastic thin shrink small outline package; 14 leads; body width 4.4 mm (REV 1.0) PDF (285.0 kB) SOT402-1 [English]	08 Feb 2016

包装 (1)

名称/描述	Modified Date
TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 1.0) PDF (217.0 kB) SOT402-1_118 [English]	08 Apr 2013

支持信息 (1)

名称/描述	Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]	08 Oct 2009

IBIS

ahct126 IBIS model (REV 1.0) ibs AHCT126 4/7/2013

订购信息

型号	状态	Family	功能	V_CC (V)	说明	Logic switching levels	Package version	Output drive capability (mA)	f_max (MHz)	No of bits	Power dissipation considerations	t_pd (ns)	T_amb (Cel)	R_th(j-a) (K/W)	Ψ_th(j-top) (K/W)	R_th(j-c) (K/W)	Package name	No of pins
74AHCT126PW	Active	AHC(T)	Buffers/inverters/drivers	4.5 - 5.5	TTL enabled (3-state)	TTL	SOT402-1	+/- 8	60	4	low	3	-40~125	138	6.91114601769911	64.2503584070796	TSSOP14	14

封装环保信息

产品编号	封装说明	Outline Version	回流/波峰焊接	包装	产品状态	部件编号订购码 (12NC)	Marking	化学成分	RoHS / 无铅 / RHF	无铅转换日期	EFR	IFR(FIT)	MTBF（小时）	MSL	MSL LF
74AHCT126PW		SOT402-1	SSOP-TSSOP-VSO-WAVE	Bulk Pack	Active	74AHCT126PW,112 (9352 627 67112)	AHCT126	74AHCT126PW		week 10, 2005	84.9	6.62	1.51E8	1	1
74AHCT126PW		SOT402-1	SSOP-TSSOP-VSO-WAVE	Reel 13" Q1/T1	Active	74AHCT126PW,118 (9352 627 67118)	AHCT126	74AHCT126PW		week 10, 2005	84.9	6.62	1.51E8	1	1

Quad buffer/line driver; 3-state 74AHCT126PW

Sorting through the low voltage logic maze 74LVC_H_245A_Q100

Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100

Ground and VCC Bounce of High-Speed Integrated Circuits 74ALVC164245DGG-Q100

Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100

Pin FMEA for AHC/AHCT family 74AHC_T_245_Q100

電圧レベルシフタ 74AVC16245DGG-Q100

Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100

ロジック製品セレクションガイド... 74LVC_H_245A_Q100

Logic selection guide 2016 74LVC_H_245A_Q100

ahct126 IBIS model 74AHCT126PW

plastic thin shrink small outline package; 14 leads; body width 4.4 mm 74LV164_Q100

SSOP-TSSOP-VSO-WAVE LPC1114FDH28

TSSOP14; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LV164_Q100

74LVC126A

74LV164

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