74AUP3G14GS: Low-power triple Schmitt trigger inverter

The 74AUP3G14 provides three inverting buffers with Schmitt trigger action which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

This device ensures a very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.

The inputs switch at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT- is defined as the input hysteresis voltage VH.

sot1203_3d
数据手册 (1)
名称/描述Modified Date
Low-power triple Schmitt trigger inverter (REV 2.0) PDF (225.0 kB) 74AUP3G14 [English]06 Oct 2016
封装信息 (1)
名称/描述Modified Date
extremely thin small outline package; no leads; 8 terminals (REV 1.0) PDF (188.0 kB) SOT1203 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
Standard product orientation 12NC ending 115 (REV 1.0) PDF (88.0 kB) SOT1203_115 [English]03 Jul 2013
支持信息 (1)
名称/描述Modified Date
MAR_SOT1203 Topmark (REV 1.0) PDF (73.0 kB) MAR_SOT1203 [English]03 Jun 2013
IBIS
订购信息
型号状态VCC (V)FamilyLogic switching levels说明Output drive capability (mA)fmax (MHz)No of bitsPower dissipation considerationstpd (ns)Tamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pinsPackage version
74AUP3G14GSActive1.1 - 3.6AUPCMOSSchmitt-trigger+/- 1.9703ultra low4.7-40~12527610.8146XSON88SOT1203
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
74AUP3G14GSSOT1203Reel 7" Q1/T1Active74AUP3G14GSX (9353 071 85115)Standard Marking74AUP3G14GSAlways Pb-free11
Low-power triple Schmitt trigger inverter 74AUP3G14GT
MAR_SOT1203 Topmark 74AXP2T3407GS
74AUP3G14 IBIS model 74AUP3G14GT
SOT1203 74AXP2T3407GS
Reel 7" Q1/T1 74AXP2T3407GS
74LVC3G17