74AVCH16T245: 16位双电源转换收发器,带可配置电压转换功能;3态

74AVCH16T245是带双向电平电压转换和3态输出的16位收发器。该器件可用作两个8位收发器或一个16位收发器。该器件具有适用于电压转换的双电源(VCC(A)和VCC(B))和四个8位输入输出端口(nAn和nBn),每个端口都有其自身的输出使能(nOE)和用于方向控制的发送/接收(nDIR)输入。VCC(A)和VCC(B)各自都可以是0.8 V和3.6 V之间的任何电压,因此该器件适用于下列电压(0.8 V、1.2 V、1.5 V、1.8 V、2.5 V和3.3 V)之间的低压转换。nDIR上的高电平会选择从nAn到nBn的传输,而nDIR上的低电平则会选择从nBn到nAn的传输。nOE上的高电平会使输出呈高阻抗关断状态。

该器件完全适合使用IOFF的局部掉电应用。IOFF电路可禁用输出,防止断电时任何破坏性回流电流通过该器件。在挂起模式下,只要VCC(A)或VCC(B)这两者之一处于GND电平,A和B就都处于高阻抗关断状态。通电侧的总线保持电路始终保持有源状态。

74AVCH16T245具有有源总线保持电路,提供该电路是为了使未使用的或浮动的数据输入保持在有效逻辑电平。该器件因此特性而无需外部上拉或下拉电阻。

Outline 3d SOT362-1
数据手册 (1)
名称/描述Modified Date
16-bit dual supply translating transceiver with configurable voltage translation; 3-state (REV 5.0) PDF (374.0 kB) 74AVCH16T245 [English]01 Mar 2012
应用说明 (2)
名称/描述Modified Date
Sorting through the low voltage logic maze (REV 1.0) PDF (72.0 kB) AN10156 [English]13 Mar 2013
Live Insertion Aspects of Philips Logic Families (REV 1.0) PDF (73.0 kB) AN252 [English]13 Mar 2013
手册 (2)
名称/描述Modified Date
電圧レベルシフタ (REV 1.1) PDF (3.1 MB) 75017511_JP [English]16 Feb 2015
Voltage translation: How to manage mixed-voltage designs with NXP® level translators (REV 1.0) PDF (2.6 MB) 75017511 [English]20 May 2014
选型工具指南 (2)
名称/描述Modified Date
Application guide: Flat-panel TV sets (REV 2.1) PDF (3.2 MB) 75017085 [English]13 Mar 2012
Application guide; Portable devices and mobile handsets (REV 2.0) PDF (15.4 MB) 75017090 [English]13 Mar 2012
封装信息 (2)
名称/描述Modified Date
plastic compatible thermal enhanced extremely thin quad flat package; no leads (REV 1.1) PDF (217.0 kB) SOT1134-2 [English]10 Jun 2016
plastic thin shrink small outline package; 48 leads; body width 6.1 mm (REV 1.0) PDF (467.0 kB) SOT362-1 [English]08 Feb 2016
包装 (1)
名称/描述Modified Date
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... (REV 5.0) PDF (242.0 kB) SOT362-1_118 [English]15 Apr 2013
支持信息 (1)
名称/描述Modified Date
Footprint for wave soldering (REV 1.0) PDF (16.0 kB) SSOP-TSSOP-VSO-WAVE [English]08 Oct 2009
IBIS
订购信息
型号状态Family说明VCC(A) (V)VCC(B) (V)Logic switching levelsOutput drive capability (mA)tpd (ns)No of bitsPower dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)No of pinsPackage namePackage version
74AVCH16T245BXActiveAVC(M)16-bit dual-supply voltage translating transceiver with bus hold (3-state)0.8 - 3.60.8 - 3.6CMOS/LVTTL+/- 122.116very low-40~12560HXQFN60USOT1134-2
74AVCH16T245DGGActiveAVC(M)16-bit dual-supply voltage translating transceiver with bus hold (3-state)0.8 - 3.60.8 - 3.6CMOS/LVTTL+/- 122.116very low-40~125811.748TSSOP48SOT362-1
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHF无铅转换日期MSLMSL LF
74AVCH16T245DGGSOT362-1SSOP-TSSOP-VSO-WAVEBulk PackActive74AVCH16T245DGG,11 (9352 862 33112)AVCH16T24574AVCH16T245DGGAlways Pb-free11
Reel 13" Q1/T1Active74AVCH16T245DGG,18 (9352 862 33118)AVCH16T24574AVCH16T245DGGAlways Pb-free11
74AVCH16T245BXSOT1134-2Reel 13" Q1/T1 in DrypackActive74AVCH16T245BX,518 (9352 958 68518)AVCH16T24574AVCH16T245BXAlways Pb-free22
16-bit dual supply translating transceiver with configurable voltage translation; 3-state 74AVCH16T245DGG
Sorting through the low voltage logic maze 74LVC_H_245A_Q100
Live Insertion Aspects of Philips Logic Families 74HC_T_245_Q100
電圧レベルシフタ 74AVC16245DGG-Q100
Voltage translation: How to manage mixed-voltage designs with NXP® level translators 74AVC16245DGG-Q100
Application guide: Flat-panel TV sets mmbz33vcl
Application guide; Portable devices and mobile handsets pesd24vs1ul
74AVCH16T245 Ibis model 74AVCH16T245DGG
plastic thin shrink small outline package; 48 leads; body width 6.1 mm 74LVC_H_16245A_Q100
SSOP-TSSOP-VSO-WAVE LPC1114FDH28
TSSOP48; Reel pack; SMD, 13" Q1/T1 Standard product orientation Orderable part number ending ,118 or... 74LVC_H_16245A_Q100
SOT1134-2 74LVC16374ABX
74LVTN16245B
74LVTN16245B