74LVC32245AEC: 32位总线收发器,具有方向针脚;5 V容压;3态

74LVC32245A是32位收发器,在发送和接收方向上都具有非反相3态总线兼容输出。该器件具有可实现轻松级联的四个输出使能输入(nOE)和实现方向控制的四个发送/接收输入(nDIR)。针脚nOE控制输出,因此总线可以得到有效隔离。

输入可通过3.3 V或5 V器件进行驱动。禁用时,可以向输出施加高达5.5 V的电压。这些特性允许将这些器件用于混合3.3 V和5 V应用。

为确保上电或掉电期间的高阻抗状态,针脚nOE应当通过上拉电阻连接到VCC;最低电阻值由驱动器灌入电流的能力确定。

74LVC32245AEC: 产品结构框图
sot536-1_3d
数据手册 (1)
名称/描述Modified Date
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state (REV 3.0) PDF (150.0 kB) 74LVC32245A [English]16 Dec 2011
应用说明 (6)
名称/描述Modified Date
(LF)BGA Application note, ATO Innovation (REV 1.0) PDF (69.0 kB) AN1026_1 [English]13 Mar 2013
Package lead inductance considerations in high-speed applications (REV 1.0) PDF (43.0 kB) AN212 [English]13 Mar 2013
ANLFBGA 32-Bit Logic Families in Low-profile Fine-pitch Ball Grid Array (LFBGA) Packages (REV 1.0) PDF (453.0 kB) ANLFBGA [English]13 Mar 2013
Pin FMEA for LVC family (REV 1.0) PDF (44.0 kB) AN11009 [English]04 Feb 2011
Power considerations when using CMOS and BiCMOS logic devices (REV 1.0) PDF (100.0 kB) AN263 [English]05 Feb 2002
Interfacing 3 Volt and 5 Volt Applications (REV 1.0) PDF (63.0 kB) AN240 [English]15 Sep 1995
选型工具指南 (2)
名称/描述Modified Date
ロジック製品セレクションガイド... (REV 1.0) PDF (38.3 MB) LOGIC_SELECTION_GUIDE_2015_JP [English]19 Nov 2015
Logic selection guide 2016 (REV 1.1) PDF (15.3 MB) 75017285 [English]08 Jan 2015
封装信息 (1)
名称/描述Modified Date
plastic low profile fine-pitch ball grid array package; 96 balls; body 13.5 x 5.5 x 1.05 mm (REV 1.0) PDF (438.0 kB) SOT536-1 [English]08 Feb 2016
订购信息
型号状态FamilyVCC (V)功能Logic switching levels说明Output drive capabilityPackage versiontpd (ns)No of bitsfmax (MHz)Power dissipation considerationsTamb (Cel)Rth(j-a) (K/W)Ψth(j-top) (K/W)Rth(j-c) (K/W)Package nameNo of pins
74LVC32245AECActiveLVC1.2 - 3.6TransceiversCMOS/LVTTL32-bit transceiver (3-state)+/- 24SOT536-12.232175low6016.0LFBGA9696
封装环保信息
产品编号封装说明Outline Version回流/波峰焊接包装产品状态部件编号订购码 (12NC)Marking化学成分RoHS / 无铅 / RHFEFRIFR(FIT)MTBF(小时)MSLMSL LF
74LVC32245AECSOT536-1Reel 13" Q1/T1 in DrypackActive74LVC32245AEC,518 (9352 849 53518)VC32245A74LVC32245AEC123.83.872.58E834
Tray, Bakeable, Multiple in DrypackActive74LVC32245AEC,557 (9352 849 53557)VC32245A74LVC32245AEC123.83.872.58E834
Tray, Bakeable, Single in DrypackActive74LVC32245AEC,551 (9352 849 53551)VC32245A74LVC32245AEC123.83.872.58E834
32-bit bus transceiver with direction pin; 5 V tolerant; 3-state 74LVC32245AEC
(LF)BGA Application note, ATO Innovation 74LVC_H_16245A_Q100
Package lead inductance considerations in high-speed applications 74LVC_H_245A_Q100
ANLFBGA 32-Bit Logic Families in Low-profile Fine-pitch Ball Grid Array (LFBGA) Packages 74LVC_H_16245A_Q100
Pin FMEA for LVC family 74LVC1G123_Q100
Power considerations when using CMOS and BiCMOS logic devices 74AHCT244PW
Interfacing 3 Volt and 5 Volt Applications 74LVC377PW
ロジック製品セレクションガイド... 74LVC_H_245A_Q100
Logic selection guide 2016 74LVC_H_245A_Q100
SOT536-1 74LVC32245AEC
74LVTH32245EC
74LVTH32245EC