MC10EP105: 3.3 V / 5.0 V ECL Quad 2-Input Differential AND/NAND Gate

The MC10/100EP105 is a quad 2-input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP105 is ideal for applications requiring the fastest AC performance available.The 100 Series contains temperature compensation.

特性

275ps Typical Propagation Delay
Maximum Frequency > 3 Ghz Typical
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V
Open Input Default State
Safety Clamp on Inputs
Pb-Free Packages are Available

应用

General Purpose Logic

封装

应用注释 (11)

Document Title	Document ID/Size	Revision
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Clock Generation and Clock and Data Marking and Ordering Information Guide	AND8002/D (71kB)	12
Designing with PECL (ECL at +5.0 V)	AN1406/D (105.0kB)	2
ECL Clock Distribution Techniques	AN1405/D (54.0kB)	1
ECLinPS Plus™ Spice Modeling Kit	AND8009/D (343.0kB)	11
Interfacing Between LVDS and ECL	AN1568/D (121.0kB)	11
Interfacing with ECLinPS	AND8066/D (72kB)	3
Metastability and the ECLinPS Family	AN1504/D (103.0kB)	3
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks	AND8001/D (90.0kB)	0
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
The ECL Translator Guide	AN1672/D (142.0kB)	12

封装图纸 (1)

Document Title	Document ID/Size	Revision
QFN32, 5x5, 0.5P, 3.1x3.1EP	488AM (57.4kB)	A

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
3.3V / 5V ECL Quad 2-Input Differential AND/NAND	MC10EP105/D (160.0kB)	11

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
MC10EP105FAG	Active	Pb-free Halide free	LQFP-32	联系BDTIC	2	Tray JEDEC	250	联系BDTIC
MC10EP105FAR2G	Active	Pb-free Halide free	LQFP-32	联系BDTIC	2	Tape and Reel	2000	联系BDTIC
MC10EP105MNG	Lifetime	Pb-free Halide free	QFN-32	488AM	1	Tube	74
MC10EP105MNR4G	Lifetime	Pb-free Halide free	QFN-32	488AM	1	Tape and Reel	1000