NB4L7210: Clock Driver, 2.5 V / 3.3 V Differential 2x10 Crosspoint, with SDI Programmable Output Selects

The NB4L7210 is a Clock input crosspoint fanout distribution device selecting between one of two input clocks on each of the 10 differential output pairs. A 10 Bit Serial Data Interface programs each output MUX to asynchronously select either Input clock. CLOCK inputs can accept LVCMOS, LVTTL, LVPECL, CML, or LVDS signal levels and incorporate an internal 50 ohms on die termination resistors. SCLK, SDATA, and SLOAD input can accept single ended LVPECL, CML, LVCMOS, LVTTL signals levels. SCLK and SDATA inputs operate up to 20 MHz. SLOAD input loads and latches the output select data. The SDATAOUT pin permits cascading multiple devices. Outputs are optimized for minimal output-to-output skew and low jitter

特性

Typical Input Clock Frequency > 2 GHz
200 ps Typical Rise and Fall Times
800 ps Typical Propagation Delay
Output to Output Skew 150 ps
2 ps RMS Typical Additive Clock Jitter
Operating Range: VCC = 2.375 V to 3.6 V with VEE = 0 V
Differential LVPECL Output Level (Typ 700 mV Peak-to-Peak)
Low Profile 8x8 mm, 52 QFN Package

优势

High Frequency
Critical Edge Placement

应用

WAN: 161.13 MHz / 667 MHz
LAN: 155.52 MHz / 622.08 MHz

终端产品

Servers

应用注释 (5)

Document Title	Document ID/Size	Revision	Revision Date
AC Characteristics of ECL Devices	AND8090/D (896.0kB)	1
Interfacing with ECLinPS	AND8066/D (72kB)	3
Storage and Handling of Drypack Surface Mount Device	AND8003/D (49kB)	2	Mar, 2016
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6
Thermal Analysis and Reliability of WIRE BONDED ECL	AND8072/D (119.0kB)	5