NB7L14: Clock / Data Fanout Buffer, 7 GHz, 1:4 Differential, LVPECL, 2.5 V, 3.3 V

The NB7L14 is a differential 1:4 LVPECL fanout buffer. The NB7L14 produces four identical LVPECL output copies of Clock or Data operating up to 7 GHz or 10.7 Gb/s, respectively. As such, the NB7L14 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT Pin. This feature allows the NB7L14 to accept various logic standards, such as LVPECL, CML, LVDS, LVCMOS or LVTTL logic levels. The VREFAC reference output can be used to rebias capacitor-coupled differential or single-ended input signals. The 1:4 fanout design was optimized for low output skew applications.

特性

Maximum Input Clock Frequnecy up to 7 GHz Typical
Maximum Input Data Rate up to 10 Gb/s Typical
< 0.8 ps of RMS Clock Jitter
< 15 ps of Data Dependent Jitter
45 ps Typical Rise and Fall Times
165 ps Typical Propogation Delay
3 ps Typical Within Device Skew
Operating Range: VCC = 2.375 V to 3.6 V
LVPECL Output Level, 720 mV Peak-to-Peak
50-ohm Internal Input Termination Resistors
Functionally Compatible with Existing 2.5 V / 3.3 V LVEL, LVEP, EP, and SG devices

应用

OC-48 and OC-192 SONET/SDH Data Buffering applications
ATE High Speed Communcations Links

应用注释 (2)

Document Title	Document ID/Size	Revision	Revision Date
Clock Generation and Clock and Data Marking and Ordering Information Guide	AND8002/D (71kB)	12
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6

封装图纸 (2)

Document Title	Document ID/Size	Revision
QFN16 3x3, 0.5P	485AE (32.1kB)	C
QFN16, 3x3, 0.5P	485G-01 (57.3kB)	F

仿真模型 (1)

Document Title	Document ID/Size	Revision	Revision Date
NB7L14 IBIS Model	NB7L14.ibs (41kB)	1.0	Mar, 2013

评估板文档 (1)

Document Title	Document ID/Size	Revision	Revision Date
NB7L14MNGEVB Manual	EVBUM2184/D (621.0kB)	0

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
2.5V/3.3V 7GHz/10Gbps Differential 1:4 LVPECL Fanout Buffer	NB7L14/D (142kB)	6	Jul, 2015

评估板与开发工具

产品	状况	Compliance	简短说明
NB7L14MNGEVB	Active	Pb-free	Differential Fanout Buffer Evaluation Board

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
NB7L14MN1G	Active	Pb-free Halide free	QFN-16	485AE	1	Tube	123	联系BDTIC
NB7L14MN1TWG	Active	Pb-free Halide free	QFN-16	485AE	1	Tape and Reel	3000	联系BDTIC
NB7L14MN1TXG	Active	Pb-free Halide free	QFN-16	485AE	1	Tape and Reel	3000	联系BDTIC
NB7L14MNG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tube	123	联系BDTIC
NB7L14MNHTBG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	100	联系BDTIC
NB7L14MNTXG	Active	Pb-free Halide free	QFN-16	485G-01	1	Tape and Reel	3000	联系BDTIC

订购产品技术参数

Product	Type	Channels	Input / Output Ratio	Input Level	Output Level	VCC Typ (V)	tJitterRMS Typ (ps)	tskew(o-o) Max (ps)	tpd Typ (ns)	tR & tF Max (ps)	fmaxClock Typ (MHz)	fmaxData Typ (Mbps)
NB7L14MN1G	Buffer	1	1:4	LVDS LVTTL CML LVCMOS LVPECL	LVPECL	2.5 3.3	0.5	15	0.165	60	8000	11000
NB7L14MN1TWG	Buffer	1	1:4	LVDS LVTTL LVCMOS LVPECL CML	LVPECL	2.5 3.3	0.5	15	0.165	60	8000	11000
NB7L14MN1TXG	Buffer	1	1:4	LVTTL LVCMOS CML LVDS LVPECL	LVPECL	3.3 2.5	0.5	15	0.165	60	8000	11000
NB7L14MNG	Buffer	1	1:4	LVTTL CML LVCMOS LVPECL LVDS	LVPECL	3.3 2.5	0.5	15	0.165	60	8000	11000
NB7L14MNHTBG	Buffer	1	1:4	LVCMOS CML LVPECL LVDS LVTTL	LVPECL	2.5 3.3	0.5	15	0.165	60	8000	11000
NB7L14MNTXG	Buffer	1	1:4	LVTTL LVDS LVPECL CML LVCMOS	LVPECL	2.5 3.3	0.5	15	0.165	60	8000	11000