NB7L585: Input Mux - 2:1 Differential, 2.5 V / 3.3 V, Clock / Data Fanout Buffer - 1:6 LVPECL

The NB7L585 is a differential 1:6 LVPECL Clock/Data distribution chip featuring a 2:1 Clock/Data input multiplexer with an input select pin. The INx/INxb inputs incorporate internal 50-ohm termination resistors and will accept LVPECL, CML, or LVDS logic levels. The NB7L585 produces six identical output copies of Clock or Data operating up to 5 GHz or 8 Gbps, respectively. As such, NB7L585 is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The NB7L585 is powered with either 2.5 V or 3.3 V supply. The NB7L585 is a member of the GigaComm™ family of high performance clock products.

特性

Maximum Input Data Rate > 8 Gb/s
Data Dependent Jitter < 15 ps
Maximum Input Clock Frequency > 5 GHz
Random Clock Jitter < 0.8 ps RMS
Low Skew 1:6 LVPECL Outputs, 20 ps max
2:1 MultiLevel Mux Inputs
175 ps Typical Propagation Delay
55 ps Typical Rise and Fall Times
Differential LVPECL Outputs, 800 mV peaktopeak, typical
Internal 50-ohm Input Termination Resistors
VREFAC Reference Output
-40°C to +85°C Ambient Operating Temperature

应用

Muliplex and Fanout

终端产品

Routers
ATE, Instrumentation

应用注释 (1)

Document Title	Document ID/Size	Revision	Revision Date
Termination of ECL Logic Devices	AND8020/D (176.0kB)	6

数据表 (1)

Document Title	Document ID/Size	Revision	Revision Date
LVPECL Clock/Data Fanout Buffer/Translator 2.5V/3.3V Differential 2:1 Mux Input to 1:6	NB7L585/D (88kB)	2

仿真模型 (1)

Document Title	Document ID/Size	Revision	Revision Date
IBIS Model for NB7L585	NB7L585.IBS (46.0kB)	1

封装图纸 (1)

Document Title	Document ID/Size	Revision
QFN32, 5x5, 0.5P, 3.1x3.1EP	488AM (57.4kB)	A

产品订购型号

产品	状况	Compliance	封装		MSL*	容器		预算价格 (1千个数量的单价）
NB7L585MNG	Active	Pb-free Halide free	QFN-32	488AM	1	Tube	74	联系BDTIC
NB7L585MNR4G	Active	Pb-free Halide free	QFN-32	488AM	1	Tape and Reel	1000	联系BDTIC
NB7L585MNTWG	Active	Pb-free Halide free	QFN-32	488AM	1	Tape and Reel	1000	$5.8

订购产品技术参数

Product	Input/Output Ratio	Channels	Input Level	Output Level	VCC Typ (V)	fMax Typ (MHz)	tJitter Typ (ps)	tskew(OO) Max (ps)	tpd Typ (ns)
NB7L585MNG	2:6	1	ECL LVDS CML	ECL	3.3 2.5	7000	0.2	20	0.175
NB7L585MNR4G	2:6	1	ECL LVDS CML	ECL	2.5 3.3	7000	0.2	20	0.175
NB7L585MNTWG	2:6	1	LVDS CML ECL	ECL	2.5 3.3	7000	0.2	20	0.175