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NB7VQ58M: Clock / Data Multiplexer / Translator, 2:1 Differential, 1.8 V / 2.5 V / 3.3 V, with CML Outputs and Selectable Input Equalizer

The NB7VQ58M is a high performance differential 2-to-1 Clock or Data multiplexer with a selectable Equalizer receiver. When placed in series with a Clock /Data path operating up to 7GHz or 10.7Gb/s, respectively, the NB7VQ58M inputs will compensate the degraded signal transmitted across an FR4 PCB backplane or cable interconnect. Therefore, the serial data rate is increased by reducing Inter-Symbol Interference (ISI) caused by losses in copper interconnect or long cables. The EQualizer ENable pin (EQEN) allows the INn/INnb inputs to either flow through or bypass the Equalizer section. Control of the Equalizer function is realized by setting EQEN; When EQEN is set Low, the INn / INnb inputs bypass the Equalizer. When EQEN is set High, the INn / INnb inputs flow through the Equalizer. The default state at start-up is LOW. As such, the NB7VQ58M is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock/Data distribution applications. The differential inputs incorporate internal 50-ohm termination resistors that are accessed through the VT pin. This feature allows the NB7VQ58M to accept various logic level standards, such as LVPECL, CML or LVDS. The NB7VQ58M produces minimal Clock or Data jitter operating up to 7GHz or 10.7Gb/s, respectively. The 16mA differential CML outputs provide matching internal 50-ohm terminations and 400mV output swings when externally terminated with a 50-ohm resistor to VCC. The NB7VQ58M is offered in a low profile 3mm x3 mm 16-pin QFN package and is a member of the GigaComm family of high performance Clock / Data products.

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