NBSG16: SiGe Differential Driver / Receiver with RSECL Outputs

The NBSG16 is a differential receiver/driver targeted for high frequency applications. The device is functionally equivalent to the EP16 and LVEP16 devices with much higher bandwidth and lower EMI capabilities.Inputs incorporate internal 50-ohm termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL, LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing ECL), 400 mV.The VBB and VMM pins are internally generated voltage supplies available to this device only. The VBB is used as a reference voltage for single-ended NECL or PECL inputs and the VMM pin is used as a reference voltage for LVCMOS inputs. For all single-ended input conditions, the unused complementary differential input is connected to VBB or VMM as a switching reference voltage. VBB or VMM may also rebias AC coupled inputs. When used, decouple VBB and VMM via a 0.01 uF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB and VMM outputs should be left open.

特性
  • Maximum Input Clock Frequency > 12 GHz Typical
  • Maximum Input Data Rate > 12 Gb/s Typical
  • 120 ps Typical Propagation Delay
  • 40 ps Typical Rise and Fall Times
  • RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
  • RSNECL Output with RSNECL or NECL Inputs with Operating Range: VCC = 0 V with VEE = -2.375 V to -3.465 V
  • RSECL Output Level (400 mV Peak-to-Peak Output), Differential Output Only
  • 50 Ω Internal Input Termination Resistors
  • VBB and VMM Reference Voltage Output
  • Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
  • Pb-Free Packages are Available
应用
  • SONET OC-192 / SDH STM-64 Optical Interface
  • 10 Gigabit Ethernet
  • Optical Networking Equipment
  • Advance Test Equipment
  • Ultra High Speed Terabit Routers
终端产品
  • ATE Instrumentation, Networking
封装
应用注释 (12)
Document TitleDocument ID/SizeRevisionRevision Date
AC Characteristics of ECL DevicesAND8090/D (896.0kB)1
Board Mounting Considerations for FCBGA PackagesAND8075/D (56.0kB)0
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN)AND8086/D (40.0kB)0
Chips that RipAND8068/D (25.0kB)0
Designing with PECL (ECL at +5.0 V)AN1406/D (105.0kB)2
ECL Clock Distribution TechniquesAN1405/D (54.0kB)1
GigaComm (SiGe) SPICE Modeling KitAND8077/D (157kB)6
Interfacing with ECLinPSAND8066/D (72kB)3
Odd Number Divide By Counters with 50% Outputs and Synchronous ClocksAND8001/D (90.0kB)0
Storage and Handling of Drypack Surface Mount DeviceAND8003/D (49kB)2Mar, 2016
Termination of ECL Logic DevicesAND8020/D (176.0kB)6
Thermal Analysis and Reliability of WIRE BONDED ECLAND8072/D (119.0kB)5
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
2.5 V/3.3 V SiGe Differential Receiver/Driver with RSECL OutputsNBSG16/D (154kB)20Jun, 2014
仿真模型 (2)
Document TitleDocument ID/SizeRevisionRevision Date
IBS Model for NBSG16BA (2.5 V)NBSG16BA_25V.IBS (9.0kB)0
IBS Model for NBSG16BA (3.3 V)NBSG16BA_33V.IBS (9.0kB)0
封装图纸 (1)
Document TitleDocument ID/SizeRevision
QFN16, 3x3, 0.5P485G-01 (57.3kB)F
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
NBSG16MNGActivePb-free Halide freeQFN-16485G-011Tube123联系BDTIC
NBSG16MNHTBGActivePb-free Halide freeQFN-16485G-011Tape and Reel100联系BDTIC
NBSG16MNR2GActivePb-free Halide freeQFN-16485G-011Tape and Reel3000联系BDTIC
订购产品技术参数
ProductTypeChannelsInput / Output RatioInput LevelOutput LevelVCC Typ (V)tJitterRMS Typ (ps)tskew(o-o) Max (ps)tpd Typ (ns)tR & tF Max (ps)fmaxClock Typ (MHz)fmaxData Typ (Mbps)
NBSG16MNGSignal Driver11:1ECL LVDS CML TTL CMOSRSECL2.5 3.30.2 0.30.12501200012000
NBSG16MNHTBGSignal Driver11:1CML TTL ECL LVDS CMOSRSECL2.5 3.30.3 0.20.12501200012000
NBSG16MNR2GSignal Driver11:1ECL LVDS CML TTL CMOSRSECL2.5 3.30.3 0.20.12501200012000
2.5 V/3.3 V SiGe Differential Receiver/Driver with RSECL Outputs (154kB) NBSG16
AC Characteristics of ECL Devices NB100LVEP91
Board Mounting Considerations for FCBGA Packages NBSG86A
Board Mounting Notes for Quad Flat-Pack No-Lead Package (QFN) NB100LVEP91
Chips that Rip NBSG86A
Designing with PECL (ECL at +5.0 V) NB100LVEP91
ECL Clock Distribution Techniques NB100LVEP91
GigaComm (SiGe) SPICE Modeling Kit NBSG86A
Interfacing with ECLinPS NB100LVEP91
Odd Number Divide By Counters with 50% Outputs and Synchronous Clocks NUP4201
Storage and Handling of Drypack Surface Mount Device NB3U23C
Termination of ECL Logic Devices NB100LVEP91
Thermal Analysis and Reliability of WIRE BONDED ECL NB100LVEP91
IBS Model for NBSG16BA (2.5 V) NBSG16
IBS Model for NBSG16BA (3.3 V) NBSG16
QFN16, 3x3, 0.5P NLSF308