P3MS650100H: Peak EMI Reduction Clock Generator, LVCMOS, 1.8 V /2.5 V / 3.3 V

P3MS650100H device is a spread spectrum frequency modulator clock generator with 1.8V/2.5V/3.3V LVCMOS output designed specifically for clock frequencies between 15MHz and 60MHz.P3MS650100H reduces electromagnetic interference (EMI) at the clock source, allowing system wide reduction of EMI of all clock dependent signals.The device allows significant system cost savings by reducing the number of circuit board layers, ferrite beads, and shielding that are traditionally required to pass EMI regulations.P3MS650100H goes to power down mode for power save when no clock is present on CLKIN pin.ModOUT goes 'low' in power down mode.P3MS650100H operates over -20°C to +85°C and is available in a 4 pin WDFN, (1.2mmX1.0mm) package.

特性
  • Peak EMI Reduction Clock Generator with LVCMOS Output
  • Input/Output Clock Frequency Range:1.6 V 2.0 V: 15 MHz 30 MHz2.3 V 3.6 V: 15 MHz 60 MHz
  • Frequency Deviation: ±1.4% @ 24 MHz
  • Power Down current less than 1 µA
  • 4pin WDFN (1.2mmX1.0mm) Package
  • Output Drive Current:1.8 V: 8 mA2.5 V/3.3 V: 16 mA
应用
  • P3MS650100H is targeted towards consumer electronic applications
终端产品
  • mobile Phones, tablets, net books and MIDs
数据表 (1)
Document TitleDocument ID/SizeRevisionRevision Date
1.8V/2.5V/3.3V, LVCMOS Peak EMI Reduction Clock GeneratorP3MS650100H/D (212.0kB)0
封装图纸 (1)
Document TitleDocument ID/SizeRevision
WDFN4, 1x1.2, 0.5P511BS (52.9kB)O
产品订购型号
产品状况Compliance封装MSL*容器预算价格 (1千个数量的单价)
P3MS650100H-4CRActivePb-free Halide freeWDFN-4511BS1Tape and Reel3000联系BDTIC
订购产品技术参数
ProductVDD Typ (V)fin Typ (MHz)fout Typ (MHz)Deviation TypeFeaturesTA Min (°C)TA Max (°C)
P3MS650100H-4CR2.5 1.8 3.315-60 15-3015-60 15-30±1.4% @ 24MHzPower Down-2085
1.8V/2.5V/3.3V, LVCMOS Peak EMI Reduction Clock Generator (212.0kB) P3MS650100H
WDFN4, 1x1.2, 0.5P P3MS650103H