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R7FS3A77C2A01CLJ.pdf |
Family12-Bit A/D Converter (unit) | Synergy MCU |
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Series12-Bit D/A Converter (ch) | S3 Series |
CPUHigh-Speed Analog Comparator | M4 |
Max. Freq (MHz)Low-Power Analog Comparator | 48 |
Code Flash (KB)PGA | 1024 |
Data Flash (KB)OPAMP | 16 |
SRAM (KB)Temperature Sensor (ch) | 192 |
Pin CountEthernet MAC Controller | 100 |
I/O CountUSBFS | 82 |
Operating Voltage Range (V)CAN | 1.6 - 5.5 |
Package TypeSD/MMC Host Interface | LGA |
Operating Temperature RangeSD/MMC Host Interface | -40 to 85 |
Exterternal Memory BusSerial Communication Interface | YES |
Exterternal Memory BusIrDA | 8 |
General PWM Timer 32-Bit Enhanced High Resolution (ch)QSPI | 0 |
General PWM Timer 32-Bit Enhanced (ch)SPI | 0 |
General PWM Timer 32-Bit (ch)I2C (ch) | 10 |
General PWM Timer 16-Bit (ch)Serial Sound Interface | 0 |
Asynchronous General purpose TimerSerial Sound Interface | 2 |
Watchdog Timer (ch)Segment LCD Controller | 1 |
Independent Watchdog TimerCapacitive Touch Sensing Unit | 1 |
DMA ControllerSafety | 4 |
Data Transfer ControllerSecurity and Encryption | 1 |
RTCSecurity and Encryption | 1 |
14-Bit A/D Converter (unit)Production Status | 1 |
14-Bit A/D Converter (ch) | 25 |
Renesas code | PTLG0100JA-A |
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Previous code | 100F0G |
JEITA code | P-TFLGA100-7x7-0.65 |
Name | TFLGA |
Terminal count | 100 |
Terminal pitch (mm) | 0.65 mm |
Dimensions (mm) | 7x7 |
Mass (g) [TYP,] | 0.1 |
Mounting height (mm)[MAX] | 1.05 |
Drawing Link | ptlg0100ja_a |
Mount pad | fig0013e |
Packing | Tray |
Terminal material - Base | Cu alloy |
Terminal material - Surface | Ni/Au |
ContainerJEDEC tray | tray0084 |
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PackingJEDEC Tray Complete dry pack | tray-D |
ContainerTape No dry pack | tape-ND |
Tape | tape2055 |
型号 | 状态 | 产品长期供应计划 | 预算价格(1000片) | 包装 | 明星产品 | RoHS |
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R7FS3A77C2A01CLJ#AC1 | Mass Production | - | | MOQ:| Wrap_SPEC:Tray| Terminal material (Base):Copper Alloy| Terminal material (Surface):Ni/Au plated| OTHER_ENV:Halogen Free| Remark: | false | 无铅 |