R8A77450HA01BG

DataSheet 数据书册
下载文件
R8A77450HA01BG.pdf
Basic Information
Product Status新产品
FamilyRZ
SeriesRZ/G
GroupRZ/G1E

Memory
Program memory0 KB ROMless
RAM332 KB
Cache Memory RemarkPrimary cache:64KB(instruction32KB/data32KB), Secondary cache:512KB

CPU (Bit, Clock, DMA, External Bus etc)
CPUCortex-A7 (32-bit)
Max. Frequency1000 MHz
PLLYES
Power-On ResetYES
Memory Management UnitYES
Floating Point UnitYES
DMA RemarksDMAC x 75ch
External Address/Data BusYES
External Interrupt Pins208
I/O Ports208

Timers
16-bit Timers4 ch
32-bit Timers12 ch
Watchdog Timers1 ch
Other TimersCompare match Timer0 x 2, Compare match Timer1 x8
PWM Output7

Interfaces
CAN2 ch
EthernetYES
Ethernet10M/100Mbps, 100M/1000Mbps
USB Ports2
USB HostYES
USB PeripheralYES
USB High-Speed SupportYES
CSIs15 ch
SPIs1 ch
UARTs18 ch
I2Cs8 ch
Serial Interface RemarksSCIF (CSI:3ch/UART:6ch), SCIFA (CSI:6ch/UART:6ch), SCIFB (CSI:3ch/UART:3ch), HSCIF (CSI:3ch/UART:3ch), QSPI (SPI:1ch)

Display Functions
Power SupplyVDD=0.98 to 1.08V, VCCQ=3.0 to 3.6V, VCCQ33_MLBP=3.0 to 3.6V(3.3V-I/O),
VCCQ_SD0 to VCCQ_SD3,VCCQ_MMC_SD=3.0 to 3.6V(3.3V-I/O),
VCCQ18=1.7 to 1.9V, VCCQ_SD0 to VCCQ_SD3,VCCQ_MMC_SD=1.7 to 1.9V(1.8V-I/O),
VDDQ_M0,VDDQ_M1,VDDQ_M1A=1.425 to 1.575V, VDD_CPGPLL=1.7 to 1.9V,
VDDQ_M0DPLL,VDDQ_M1DPLL,VDDQ_M1MPLL,VDDQ_M0APLL,VDDQ_M1APLL=1.7 to 1.9V,
AVDD=1.7 to 1.9V, VD331=3.0 to 3.6V, VD181=1.7 to 1.9V
Operating Temperature-40 to 85 ℃ (Ambient Temperature)

Operating Conditions
High-resolution display controllerDU(Display Unit)

Package
Pins501
Terminal pitch (mm)0.8 mm
Package TypeHBGA
Dimensions (mm)21x21 mm2
Drawing Linkprbg0501ga_a
Mounting height (mm)[MAX]2.4 mm
Mass (g) [TYP,]1.6 g
Renesas codePRBG0501GA-A (old: 501F7S-A )
JEITA codeP-FBGA501-21x21-0.80
RemarksFCBGA
Terminal material - BaseSn-Ag-Cu
订购型号
型号状态产品长期供应计划预算价格(1000片) 包装明星产品RoHS
R8A77450HA01BG#UAMass Production-| WRAP_SPEC:Tray| Terminal material (Base):Sn-Ag-Cu|false无铅
RZ/G Series User's Manual: Hardware Sep.30.16;Rev.1.00;52.78 Mbytes