技术特性| Sub Family | LVDS SerDes | | Function | Serializer | | Input Signal Type | LVCMOS | | Output Signal Type | LVDS | | No.of Tx | 8 | | Clock frequency (Min.)[MHz] | 10 | | Clock frequency (Max.)[MHz] | 174 | | Data Rates [Mbps] | 1218 | | Parallel Bus Width | 27 | | Supply Voltage(Min.)[V] | 1.62 | | Supply Voltage(Max.)[V] | 3.6 | | Operating Temperature (Min.)[°C] | -45 | | Operating Temperature (Max.)[°C] | 80 |
| 技术资料下载产品特点- 27bits data of parallel LVCMOS level inputs are onverted to 4 or 8 channels of LVDS data stream.
- The maximum data rate is 1218Mbps/Lane
- Support clock frequency from 10MHz up to 174MHz
- Flexible Input/Output mode
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