/**
  @page DMA_FSMC DMA FSMC example
  
  @verbatim
  ******************** (C) COPYRIGHT 2012 STMicroelectronics *******************
  * @file    DMA/FSMC/readme.txt 
  * @author  MCD Application Team
  * @version V1.0.0
  * @date    24-January-2012
  * @brief   Description of the DMA FSMC example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   @endverbatim

@par Example Description 

This example provides a description of how to use two DMA channels to transfer
a word data buffer from Flash memory to external SRAM memory and to recuperate
the written data from external SRAM to be stored in internal SRAM.

DMA2 Channel5 is configured to transfer, word by word, the contents of a 32-word data 
buffer stored in Flash memory to the external SRAM memory interfaced by FSMC.
The start of transfer is triggered by software. DMA2 Channel5 memory-to-memory
transfer is enabled.
Source and destination address incrementing is also enabled. The transfer is started
by setting the Channel enable bit for DMA2 Channel5. A polling on the Transfer Complete
flag is done to check the end of transfer. The DMA2 Channel5 Transfer complete flag
is then cleared.

DMA1 Channel3 is configured to transfer, byte by byte, the contents of the first
128Bytes of external SRAM to the internal SRAM memory. The start of transfer is
triggered by software. DMA1 Channel3 memory-to-memory transfer is enabled.
Source and destination address incrementing is also enabled. The transfer is started
by setting the Channel enable bit for DMA1 Channel3. A polling on the Transfer Complete
flag is done to check the end of transfer.

A comparison between the source and destination buffers is done to check that all data
have been correctly transferred.


@par Directory contents 

  - DMA/FSMC/stm32l1xx_conf.h    Library Configuration file
  - DMA/FSMC/stm32l1xx_it.c      Interrupt handlers
  - DMA/FSMC/stm32l1xx_it.h      Interrupt handlers header file
  - DMA/FSMC/main.c              Main program
  - DMA/FSMC/system_stm32l1xx.c  STM32L1xx system source file

@note The "system_stm32l1xx.c" is generated by an automatic clock configuration 
      system and can be easily customized to your own configuration. 
      To select different clock setup, use the "STM32L1xx_Clock_Configuration_V1.1.0.xls" 
      provided with the AN3309 package available on <a href="http://www.st.com/internet/mcu/family/141.jsp">  ST Microcontrollers </a>

@par Hardware and Software environment 

  - This example runs on STM32L1xx Ultra Low Power High-density devices.

  - This example has been tested with STMicroelectronics STM32L152D-EVAL (STM32L1xx 
    Ultra Low Power High-Density) evaluation board and can be easily tailored 
    to any other supported device and development board.

@par How to use it ? 

In order to make the program work, you must do the following :
 - Copy all source files from this example folder to the template folder under
   Project\STM32L1xx_StdPeriph_Templates
 - Open your preferred toolchain 
 - Rebuild all files and load your image into target memory
 - Run the example

@note
- Ultra Low Power Medium-density devices are STM32L151xx and STM32L152xx 
  microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
- Ultra Low Power Medium-density Plus devices are STM32L151xx, STM32L152xx and 
  STM32L162xx microcontrollers where the Flash memory density is 256 Kbytes.
- Ultra Low Power High-density devices are STM32L151xx, STM32L152xx and STM32L162xx 
  microcontrollers where the Flash memory density is 384 Kbytes.
    
 * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
 */


