/**
  @page GPIO_IOToggle GPIO IO Toggle example
  
  @verbatim
  ******************** (C) COPYRIGHT 2012 STMicroelectronics *******************
  * @file    GPIO/IOToggle/readme.txt 
  * @author  MCD Application Team
  * @version V1.1.1
  * @date    13-April-2012
  * @brief   Description of the GPIO IO Toggle example.
  ******************************************************************************
  *
  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  * You may not use this file except in compliance with the License.
  * You may obtain a copy of the License at:
  *
  *        http://www.st.com/software_license_agreement_liberty_v2
  *
  * Unless required by applicable law or agreed to in writing, software 
  * distributed under the License is distributed on an "AS IS" BASIS, 
  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  * See the License for the specific language governing permissions and
  * limitations under the License.
  *
  ******************************************************************************
   @endverbatim

@par Example Description 

GPIO ports are connected on AHB bus, using BSRRH and BSRRL registers one cycle is
required to set a pin and another cycle to reset it. So GPIO pins can toggle at
AHB clock divided by 2.

This example describes how to use BSRRH and BSRRL (Port Bit Set/Reset Register
High and Low) for maximum IO toggling.

PD0 and PD1 when using the STM32L152-EVAL or PD3 and PD7 when using the STM32L152-EVAL 
(configured in output pushpull mode) toggles in a forever loop:
 - Set PD0 and PD1 or PD3 and PD7 by setting corresponding bits in BSRRL register
 - Reset PD3 and PD7 or PD3 and PD7by setting corresponding bits in BSRRH register

In this example, HCLK is configured at 32 MHz so PD3 and PD7 toggles at 16MHz.
To achieve the maximum IO toggling frequency, you have to configure your compiler
options for high speed optimization.

@par Directory contents 

  - GPIO/IOToggle/stm32l1xx_conf.h    Library Configuration file
  - GPIO/IOToggle/stm32l1xx_it.c      Interrupt handlers
  - GPIO/IOToggle/stm32l1xx_it.h      Interrupt handlers header file
  - GPIO/IOToggle/main.c              Main program
  - GPIO/IOToggle/system_stm32l1xx.c  STM32L1xx system source file

@note The "system_stm32l1xx.c" is generated by an automatic clock configuration 
      system and can be easily customized to your own configuration. 
      To select different clock setup, use the "STM32L1xx_Clock_Configuration_V1.1.0.xls" 
      provided with the AN3309 package available on <a href="http://www.st.com/internet/mcu/family/141.jsp">  ST Microcontrollers </a>

@par Hardware and Software environment

  - This example runs on STM32L1xx Ultra Low Power High-, Medium-Density and Medium-Density Plus Devices.

  - This example has been tested with STMicroelectronics STM32L152D-EVAL (STM32L1xx 
    Ultra Low Power High-Density) and STM32L152-EVAL (STM32L1xx Ultra Low 
    Power Medium-Density) evaluation board and can be easily tailored to any 
    other supported device and development board.

@par How to use it ? 

In order to make the program work, you must do the following :
 - Copy all source files from this example folder to the template folder under
   Project\STM32L1xx_StdPeriph_Templates
 - Open your preferred toolchain 
 - Rebuild all files and load your image into target memory
 - Run the example

@note
- Ultra Low Power Medium-density devices are STM32L151xx and STM32L152xx 
  microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes.
- Ultra Low Power Medium-density Plus devices are STM32L151xx, STM32L152xx and 
  STM32L162xx microcontrollers where the Flash memory density is 256 Kbytes.
- Ultra Low Power High-density devices are STM32L151xx, STM32L152xx and STM32L162xx 
  microcontrollers where the Flash memory density is 384 Kbytes.
    
 * <h3><center>&copy; COPYRIGHT STMicroelectronics</center></h3>
 */


