/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
* File Name          : Readme.txt
* Author             : MCD Application Team
* Version            : V4.0
* Date               : 10/09/2007
* Description        : Description of the BSPI Example.
********************************************************************************
* THE PRESENT SOFTWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
* CONTENT OF SUCH SOFTWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*******************************************************************************/

Example description
===================

In this example shows how to use the BSPI interrupt source as receive FIFO FUll.
The BSPI0 and BSPI1 are connected together on the same bus. BSPI1 is
configured as Master and BSPI0 as Slave, both with a word of 8 bits and Tx/Rx
FIFO of 9 bytes. The BSPI clock frequency is fixed to APB1/6.

The BSPI1 transmits a nine data buffer size to BSPI1. When all data are transmitted
the BSPI0 recieve FIFO will be full (the number of data recieved is equal to the 
receive FIFO depth) and generates an interrupt. In the BSPI ISR, the recieved  
data are stored in the "Receivetab" variable.

This example demonstrates the following features of the BSPI :

  - The BSPI recieve FIFO interrupt generation,
  - Master and Slave modes support,
  - Internal clock prescaler,
  - Programmable depth transmit FIFO,
  - Programmable depth receive FIFO,
  - Operate with 8 bit word length.

It is made of 4 parts :

  1) Configure BSPI1 as a master,
  2) Configure BSPI0 as a slave,
  3) Configure EIC channel,
  4) Configure the BSPI0 receive FIFO FUll interrupt  
  5) Transmission of nine bytes from Master to Slave,
  6) In the BSPI ISR, read the nine bytes received
  

Directory contents
==================
 71x_conf.h  Library Configuration file
 71x_it.c    Interrupt handlers
 71x_it.h    Interrupt handlers header file
 main.c      Main program
 

Hardware environment
====================
In order to make the program work, you must do the following implementation:

  - Connect BSPI0 MISO pin (P0.0) to BSPI1 MISO pin (P0.4),
  - Connect BSPI0 MOSI pin (P0.1) to BSPI1 MOSI pin (P0.5),
  - Connect BSPI0 SCLK pin (P0.2) to BSPI1 SCLK pin (P0.6),
  - Connect BSPI0 SS pin (P0.3) to ground,
  - Connect BSPI1 SS pin (P0.7) to Vdd.


How to use it
=============
In order to make the program work, you must do the following:
- Create a project and setup all your toolchain's start-up files
- Compile the directory content files and required Library files :
  + 71x_lib.c
  + 71x_bspi.c
  + 71x_apb.c
  + 71x_eic.c
  + 71x_gpio.c
  + 71x_rccu.c

- Link all compiled files and load your image into either RAM or FLASH
- You can verify the "Receivetab" variable content using the toolset watch window.


******************* (C) COPYRIGHT 2007 STMicroelectronics *****END OF FILE****
