The AD5346/AD5347/AD5348 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. A readback feature allows the internal DAC registers to be read back through the digital port. The GAIN pin on these devices allows the output range to be set at 0 V to VREF or 0 V to 2 x VREF. Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin. An asynchronous CLR input is also provided, which resets the contents of the Input Register and the DAC Register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. All three parts are pin-compatible, which allows the user to select the amount of resolution appropriate for their application without redesigning their circuit board. APPLICATIONS Portable battery-powered instruments Digital gain and offset adjustment Programmable voltage and current sources Optical networking Automatic test equipment Mobile communications Programmable attenuators Industrial process control
The AD5346/AD5347/AD5348 are octal 8-, 10-, and 12- bit DACs, operating from a 2.5 V to 5.5 V supply. These devices incorporate an on-chip output buffer that can drive the output to both supply rails, and also allows a choice of buffered or unbuffered reference input.
The AD5346/AD5347/AD5348 have a parallel interface. CS selects the device and data is loaded into the input registers on the rising edge of WR. A readback feature allows the internal DAC registers to be read back through the digital port.
The GAIN pin on these devices allows the output range to be set at 0 V to VREF or 0 V to 2 x VREF.
Input data to the DACs is double-buffered, allowing simultaneous update of multiple DACs in a system using the LDAC pin.
An asynchronous CLR input is also provided, which resets the contents of the Input Register and the DAC Register to all zeros. These devices also incorporate a power-on-reset circuit that ensures that the DAC output powers on to 0 V and remains there until valid data is written to the device. All three parts are pin-compatible, which allows the user to select the amount of resolution appropriate for their application without redesigning their circuit board.
Features and Benefits
| Digital to Analog Converters |
| Document | note |
| AD5346/AD5347/AD5348: 2.5 V to 5.5 V, Parallel Interface Octal Voltage Output 8-/10-/12-Bit DACs Data Sheet (Rev. A) | PDF 949 kB |
| Document | note |
| Extending the denseDAC™ Multichannel D/As | PDF 1100 kB |
| Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
|---|---|---|---|---|---|---|
| AD5348BCPZ Production | 40 ld LFCSP (6x6mm w/4.10mm pad) | OTH 490 | -40 to 105C | 12.35 | 10 | Y |
| AD5348BRU Last Time Buy | 38 ld TSSOP | OTH 50 | -40 to 105C | 13.52 | 10.96 | N |
| AD5348BRUZ Production | 38 ld TSSOP | OTH 50 | -40 to 105C | 12.29 | 9.96 | Y |
