AD5554 Quad, Current-Output, Serial-Input 16-/14-Bit DACs

A double-buffered serial data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial data in (SDI), a chip select (CS), and clock (CLK) signals. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. A common, level-sensitive, load DAC strobe (LDAC) input allows the simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to 0 at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1. The AD5544 is packaged in the compact 28-lead SSOP and 32-lead LFCSP. The AD5554 is packaged in the compact 28-lead SSOP Applications Automatic test equipment Instrumentation Digitally controlled calibration

The AD5544/AD5554 quad, 16-/14-bit, current output, digital-to-analog converters (DACs) are designed to operate from 2.7 V to 5.5 V supply range.

The applied external reference input voltage (VREFX) determines the full-scale output current. Integrated feedback resistors (RFB) provide temperature-tracking, full-scale voltage outputs when combined with an external I-to-V precision amplifier.

A double-buffered serial data interface offers high speed, 3-wire, SPI- and microcontroller-compatible inputs using serial data in (SDI), a chip select (CS), and clock (CLK) signals. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. A common, level-sensitive, load DAC strobe (LDAC) input allows the simultaneous update of all DAC outputs from previously loaded input registers. Additionally, an internal power-on reset forces the output voltage to 0 at system turn-on. An MSB pin allows system reset assertion (RS) to force all registers to zero code when MSB = 0, or to half-scale code when MSB = 1.

The AD5544 is packaged in the compact 28-lead SSOP and 32-lead LFCSP. The AD5554 is packaged in the compact 28-lead SSOP

Applications
  • Automatic test equipment
  • Instrumentation
  • Digitally controlled calibration
Features and Benefits
  • 14-bit resolution
  • INL of ±0.5 LSB (B Grade)
  • 2 mA full-scale current ± 20%, with VREF = ±10 V
  • 0.9 μs settling time to ±0.1%
  • 12 MHz multiplying bandwidth
  • Midscale glitch of −1 nV-sec
  • Midscale or zero-scale reset
  • Four separate, 4-quadrant multiplying reference inputs
  • See data sheet for additional feature
Digital to Analog Converters
Data Sheets
Documentnote
AD5544/AD5554: Quad, Current-Output,Serial-Input 16-/14-Bit DACs Data Sheet (Rev. H)PDF 903 kB
Application Notes
Documentnote
AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC (Rev. 0)PDF 246 kB
AN-320A: CMOS Multiplying DACs and Op Amps Combine to Build Programmable Gain Amplifier, Part 1PDF 1295 kB
AN-137: A Digitally Programmable Gain and Attenuation Amplifier DesignPDF 52 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD5554BRSZ Production28 ld SSOPOTH 47-40 to 125C19.215.56Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
EV-AD5544/45SDZCombination Evaluation Board75Y
EVAL-SDP-CB1ZEvaluation Controller Board99Y
Reference Materials
AD5544/AD5554: Quad, Current-Output,Serial-Input 16-/14-Bit DACs Data Sheet (Rev. H) ad5544
AD5544/AD5554: 4通道、电流输出、串行输入、16/14位DAC (Rev. F) ad5544
AN-912: 用平衡电流输出DAC驱动中心抽头变压器[中文版] (Rev. 0) ad7524
AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC (Rev. 0) ad7524
AN-320A: CMOS Multiplying DACs and Op Amps Combine to Build Programmable Gain Amplifier, Part 1 ad7524
AN-137: A Digitally Programmable Gain and Attenuation Amplifier Design ad7524
Multiplying DACs Flexible Building Blocks ad5544
Digital to Analog Converters ICs Solutions Bulletin ad5590