AD6644 14-Bit, 40 MSPS/65 MSPS Analog-to-Digital Converter

Guaranteed sample rate is 65 MSPS. Fully differential analog input stage. Digital outputs can be run on 3.3 V supply for easy interface to digital ASICs. Complete solution: reference and track-and-hold. Packaged in small, surface-mount, plastic, 52-lead LQFP.

The AD6644 is a high speed, high performance, monolithic 14-bit analog-to-digital converter (ADC). All necessary functions, including track-and-hold (TH) and reference are included on- chip to provide a complete conversion solution. The AD6644 provides CMOS-compatible digital outputs. It is the third generation in a wideband ADC family, preceded by the AD9042 (12-bit 41 MSPS) and the AD6640 (12-bit 65 MSPS, IF sampling).

Designed for multichannel, multimode receivers, the AD6644 is part of the Analog Devices, Inc. new SoftCell® transceiver chipset. The AD6644 achieves 100 dB multitone, spurious-free dynamic range (SFDR) through the Nyquist band. This break- through performance eases the burden placed on multimode digital receivers (software radios) which are typically limited by the ADC. Noise performance is exceptional; typical signal-to- noise ratio is 74 dB.

The AD6644 is also useful in single channel digital receivers designed for use in wide-channel bandwidth systems (CDMA, WCDMA). With oversampling, harmonics can be placed outside the analysis bandwidth. Oversampling also facilitates the use of decimation receivers (such as the AD6620), allowing the noise floor in the analysis bandwidth to be reduced. By replacing traditional analog filters with predictable digital components, modern receivers can be built using fewer RF components, resulting in decreased manufacturing costs, higher manufacturing yields, and improved reliability.

The AD6644 is built on the Analog Devices high speed complementary bipolar process (XFCB) and uses an innovative, multipass circuit architecture. Units are packaged in a 52-lead plastic low profile quad flat package (LQFP) specified from – 25°C to +85°C.

Product Highlights

Applications

Multichannel, multimode receivers
AMPS, IS-136, CDMA, GSM, WCDMA
Single channel digital receivers
Antenna array processing
Communications instrumentation
Radar, infrared imaging
Instrumentation

Features and Benefits

65 MSPS guaranteed sample rate
40 MSPS version available
Sampling jitter < 300 fs
100 dB multitone SFDR
1.3 W power dissipation
Differential analog inputs

Pin compatible to AD6645
Twos complement digital output format
3.3 V CMOS compatible
Data-ready for output latching

Analog to Digital Converters

Data Sheets

Document	note
AD6644: 14-Bit, 40 MSPS/65 MSPS Analog-to-Digital Converter Data Sheet (Rev. D)	PDF 829 kB

Application Notes

Document	note
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)	PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)	PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)	PDF 227 kB
AN-282: Fundamentals of Sampled Data Systems	PDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)	PDF 291.7 K
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)	PDF 363 kB
AN-345: Grounding for Low-and-High-Frequency Circuits	PDF 455 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)	PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)	PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)	PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)	PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)	PDF 1535 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)	PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)	PDF 1679 kB
AN-302: Exploit Digital Advantages in an SSB Receiver	PDF 417 kB