AD6674 385 MHz BW IF Diversity Receiver
The AD6674 is a 385 MHz bandwidth mixed-signal
intermediate frequency (IF) receiver. It consists of two, 14-bit
1.0 GSPS/750 MSPS/500 MSPS analog-to-digital converters
(ADC) and various digital signal processing blocks consisting of four wideband DDCs, an NSR, and VDR monitoring. It has an on-chip buffer and a sample-and-hold circuit designed for low
power, small size, and ease of use. This product is designed to support communications applications capable of sampling wide bandwidth analog signals of up to 2 GHz. The AD6674 is
optimized for wide input bandwidth, high sampling rate,
excellent linearity, and low power in a small package.
The dual ADC cores feature a multistage, differential pipelined
architecture with integrated output error correction logic. Each ADC features wide bandwidth inputs supporting a variety of user-selectable input ranges. An integrated voltage reference
eases design considerations.
Applications
- Diversity multiband, multimode digital receivers 3G/4G, TD-SCDMA, W-CDMA, GSM, LTE, LTE-A
- DOCSIS 3.0 CMTS upstream receive paths
- HFC digital reverse path receivers
Features and BenefitsJESD204B (Subclass 1) coded serial digital outputsIn band SFDR = 83 dBFS at 340 MHz (750 MSPS)In band SNR = 66.7 dBFS at 340 MHz (750 MSPS)1.4 W total power per channel at 750 MSPS (default settings)Noise density = −153 dBFS/Hz at 750 MSPS1.25 V, 2.5 V, and 3.3 V dc supply operationFlexible input range- AD6674-750 and AD6674-1000
1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal)
- AD6674-500
1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal)
AD6674-750 and AD6674-1000
1.46 V p-p to 1.94 V p-p (1.70 V p-p nominal)AD6674-500
1.46 V p-p to 2.06 V p-p (2.06 V p-p nominal)95 dB channel isolation/crosstalkAmplitude detect bits for efficient automatic gain control (AGC) implementationNoise shaping requantizer (NSR) option for main receiver functionVariable dynamic range (VDR) option for digital predistortion (DPD) function2 integrated wideband digital processors per channel- 12-bit numerically controlled oscillator (NCO), up to 4 cascaded half-band filters
12-bit numerically controlled oscillator (NCO), up to 4 cascaded half-band filtersDifferential clock inputsInteger clock divide by 1, 2, 4, or 8Energy saving power-down modesFlexible JESD204B lane configurationsSmall signal dither | CommunicationsIBIS ModelsDesign Tools |
Data Sheets
Application Notes
Order Information
| Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
|---|
| AD6674BCPZ-1000 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | OTH 260 | -40 to 85C | 687.5 | 584.38 | Y |
| AD6674BCPZ-500 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | OTH 260 | -40 to 85C | 320 | 272 | Y |
| AD6674BCPZ-750 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | OTH 260 | -40 to 85C | 435 | 369.75 | Y |
| AD6674BCPZRL7-1000 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | REEL 750 | -40 to 85C | 687.5 | 584.38 | Y |
| AD6674BCPZRL7-500 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | REEL 750 | -40 to 85C | 320 | 272 | Y |
| AD6674BCPZRL7-750 Production | 64 ld LFCSP (9x9mm, 7.6mm exposed pad) | REEL 750 | -40 to 85C | 435 | 369.75 | Y |
Evaluation Boards
| Part Number | Description | Price | RoHS |
|---|
| AD6674-1000EBZ | Evaluation board for the AD6674-1000 (Optimized for Full Analog Input Frequency Range) | 995 | Y |
| AD6674-500EBZ | Evaluation board for the AD6674-500 (Optimized for Full Analog Input Frequency Range) | 795 | Y |
| AD6674-750EBZ | Evaluation board for the AD6674-750 (Optimized for Full Analog Input Frequency Range) | 895 | Y |
| AD6674-LF1000EBZ | Evaluation board for AD6674-1000 (Up to 1GHz Input Bandwidth) | 775 | Y |
| AD6674-LF500EBZ | Evaluation board for AD6674-500 (Up to 1GHz Input Bandwidth) | 575 | Y |
| AD6674-LF750EBZ | Evaluation board for AD6674-750 (Up to 1GHz Input Bandwidth) | 675 | Y |
Reference Materials
