Features and Benefits- 2-Channel, 24-Bit Σ-Δ ADC
Pin Configurable (No Programmable Registers)
Pin Selectable Input Channels
Pin Programmable Input Ranges (±2.56 V or ±160 mV) - Fixed 19.79 Hz Update Rate
- Simultaneous 50 Hz and 60 Hz Rejection
- 24-Bit No Missing Codes
- 18.5-Bit p-p Resolution (±2.56 V Range)
- On-Chip Functions Rail-Rail Input Buffer and PGA
- 16.5-Bit p-p Resolution (±160 mV Range)
- Interface
Master or Slave Mode of Operation
Slave Mode:
3-Wire Serial
SPI®, QSPI™, MICROWIRE™, and DSP-Compatible
Schmitt Trigger on SCLK - Power
Specified for Single 3 V and 5 V Operation
Normal: 1.3 mA @ 3 V
Power-Down: 9 µA
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