AD9200 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter

The sample-and-hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. AC coupled input signals can be shifted to a predetermined level, with an onboard clamp circuit (AD9200ARS, AD9200KST). The dynamic performance is excellent. The AD9200 has an onboard programmable reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range signal (OTR) indicates an overflow condition which can be used with the most significant bit to determine low or high overflow. The AD9200 can operate with supply range from 2.7 V to 5.5 V, ideally suiting it for low power operation in high speed portable applications. The AD9200 is specified over the industrial (­40°C to +85°C) and commercial (0°C to +70°C) temperature ranges.

The AD9200 is a monolithic, single supply, 10-bit, 20 MSPS analog-to-digital converter with an on-chip sample-and-hold amplifier and voltage reference. The AD9200 uses a multistage differential pipeline architecture at 20 MSPS data rates and guarantees no missing codes over the full operating temperature range.

The input of the AD9200 has been designed to ease the development of both imaging and communications systems. The user can select a variety of input ranges and offsets and can drive the input either single-ended or differentially.

The sample-and-hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels and sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. AC coupled input signals can be shifted to a predetermined level, with an onboard clamp circuit (AD9200ARS, AD9200KST). The dynamic performance is excellent.

The AD9200 has an onboard programmable reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application.

A single clock input is used to control all internal conversion cycles. The digital output data is presented in straight binary output format. An out-of-range signal (OTR) indicates an overflow condition which can be used with the most significant bit to determine low or high overflow.

The AD9200 can operate with supply range from 2.7 V to 5.5 V, ideally suiting it for low power operation in high speed portable applications.

The AD9200 is specified over the industrial (­40°C to +85°C) and commercial (0°C to +70°C) temperature ranges.

Features and Benefits
  • Pin-Compatible with AD876
  • Power Dissipation: 80 mW (3 V Supply)
  • Operation Between 2.7 V and 5.5 V Supply
  • Differential Nonlinearity: 0.5 LSB
  • Power-Down (Sleep) Mode
  • Three-State Outputs
  • Out-of-Range Indicator
  • Built-In Clamp Function (DC Restore)
  • Adjustable On-Chip Voltage Reference
  • IF Undersampling to 135 MHz
Analog to Digital Converters
Data Sheets
Documentnote
AD9200: Complete 10-Bit, 20 MSPS, 80mW CMOS A/D Converter Data Sheet (Rev. E)PDF 338 kB
Application Notes
Documentnote
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
AN-302: Exploit Digital Advantages in an SSB ReceiverPDF 417 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9200ARS Production28 ld SSOPOTH 47-40 to 85C3.63.07N
AD9200ARSZ Production28 ld SSOPOTH 47-40 to 85C2.982.53Y
AD9200ARSZRL Production28 ld SSOPREEL 1500-40 to 85C02.53Y
AD9200JRSZ Production28 ld SSOPOTH 470 to 70C2.982.53Y
AD9200JRSZRL ProductionSSOP 5.3 MMREEL 15000 to 70C02.53Y
Reference Materials
AD9200: Complete 10-Bit, 20 MSPS, 80mW CMOS A/D Converter Data Sheet (Rev. E) ad9200
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
AN-302: Exploit Digital Advantages in an SSB Receiver ad6600
MS-2210：高速ADC的电源设计 ad9861
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