AD9223 12-Bit, 3.0 MSPS A/D Converter

The AD9221, AD9223, and AD9220 are a generation of high performance, single supply 12-bit analog-to-digital converters. Each device exhibits true 12-bit linearity and temperature drift performance1 as well as 11.5 bit or better ac performance2. The AD9221/AD9223/AD9220 share the same interface options, package, and pinout. Thus, the product family provides an upward or downward component selection path based on performance, sample rate and power. The devices differ with respect to their specified sampling rate and power consumption which is reflected in their dynamic performance over frequency.

The AD9221/AD9223/AD9220 combine a low cost, high speed single-CMOS process and a novel architecture to achieve the resolution and speed of existing hybrid and monolithic implementations at a fraction of the power consumption and cost. Each device is a complete, monolithic ADC with an on-chip, high performance, low noise sample-and-hold amplifier and programmable voltage reference. An external reference can also be chosen to suit the dc accuracy and temperature drift requirements of the application. The devices use a multistage differential pipelined architecture with digital output error correction logic to provide 12-bit accuracy at the specified data rates and to guarantee no missing codes over the full operating temperature range.

The input of the AD9221/AD9223/AD9220 is highly flexible, allowing for easy interfacing to imaging, communications, medical, and data-acquisition systems. A truly differential input structure allows for both single-ended and differential input sample-interfaces of varying input spans. The sample-and-hold (SHA) amplifier is equally suited for both multiplexed systems that switch full-scale voltage levels in successive channels as well as sampling single-channel inputs at frequencies up to and beyond the Nyquist rate. Also, the AD9221/AD9223/AD9220 is well suited for communication systems employing IF Down Conversion since the SHA in the differential input mode can achieve excellent dynamic performance far beyond its specified Nyquist frequency2.

A single clock input is used to control all internal conversion The digital output data is presented in straight binary format. An out-of-range (OTR) signal indicates an flow condition which can be used with the most significant bit to determine low or high overflow.

NOTES: 1 Excluding internal voltage reference 2 Depends on the analog input configuration

Features and Benefits
  • Monolithic 12-Bit A/D Converter Product Family
  • Family Members are: AD9221, AD9223, and AD9220
  • Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and 10 MSPS
  • Low Power Dissipation: 59 mW, 100 mW, and 250 mW
  • Single +5 V Supply
  • Integral Nonlinearity Error: 0.5 LSB
  • Differential Nonlinearity Error: 0.3 LSB
  • 70 dB SNR and 86 dB SFDR
  • Out-of-Range Indicator
  • 28-SOIC and 28-SSOP
Analog to Digital Converters
Data Sheets
Documentnote
AD9221/AD9223/AD9220: Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters Data Sheet (Rev. E)PDF 512 kB
Application Notes
Documentnote
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
AN-414: Low Cost, Low Power Devices for HDSL ApplicationsPDF 41 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9223ARSZ Production28 ld SSOPOTH 47-40 to 85C10.488.9Y
AD9223ARSZ-REEL Production28 ld SSOPREEL 1500-40 to 85C08.9Y
AD9223ARZ Production28 ld SOIC - WideOTH 27-40 to 85C13.0211.08Y
AD9223ARZ-REEL Production28 ld SOIC - WideREEL 1000-40 to 85C011.08Y
Reference Materials
AD9221/AD9223/AD9220: Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters Data Sheet (Rev. E) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
AN-414: Low Cost, Low Power Devices for HDSL Applications ad9221
MS-2210：高速ADC的电源设计 ad9861
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