AD9233 12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-Digital Converter

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The AD9233 is a monolithic, single 1.8 V supply, 12-bit, 80 MSPS/ 105 MSPS/125 MSPS analog-to-digital converter (ADC), featuring a high performance sample-and-hold amplifier (SHA) and on-chip voltage reference. The product uses a multistage differential pipeline architecture with output error correction logic to provide 12-bit accuracy at 125 MSPS data rates and guarantees no missing codes over the full operating temperature range.

The wide bandwidth, truly differential SHA allows a variety of user-selectable input ranges and offsets, including single-ended applications. It is suitable for multiplexed systems that switch full-scale voltage levels in successive channels and for sampling single-channel inputs at frequencies well beyond the Nyquist rate. Combined with power and cost savings over previously available ADCs, the AD9233 is suitable for applications in communications, imaging, and medical ultrasound.

A differential clock input controls all internal conversion cycles. A duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.

The digital output data is presented in offset binary, Gray code, or twos complement formats. A data output clock (DCO) is provided to ensure proper latch timing with receiving logic.

The AD9233 is available in a 48-lead LFCSP and is specified over the industrial temperature range (−40°C to +85°C).

Product Highlights
  • The AD9233 operates from a single 1.8 V power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families.
  • The patented SHA input maintains excellent performance for input frequencies up to 225 MHz.
  • The clock DCS maintains overall ADC performance over a wide range of clock pulse widths.
  • A standard serial port interface supports various product features and functions, such as data formatting (offset binary, twos complement, or Gray coding), enabling the clock DCS, power-down, and voltage reference mode.
  • The AD9233 is pin compatible with the AD9246, allowing a simple migration from 12 bits to 14 bits.
Applications
  • Ultrasound equipment
  • IF sampling in communications receivers - IS-95, CDMA-One, IMT-2000
  • Battery-powered instruments
  • Hand-held scopemeters
  • Low cost digital oscilloscopes
Features and Benefits
  • Chinese data sheet available
  • 1.8 V analog supply operation
  • 1.8 V to 3.3 V output supply
  • DNL = ±0.15 LSB
  • SFDR = 85 dBc to 70 MHz input
  • Low power: 395 mW @ 125 MSPS
  • Differential input with 650 MHz bandwidth
  • On-chip voltage reference and sample-and-hold amplifier
  • 11-bit 140Msps device available (AD80141)
  • Flexible analog input: 1 V p-p to 2 V p-p range
  • Offset binary, Gray code, or twos complement data format
  • Data output clock and clock duty cycle stabilizer
  • Serial port control
  • Built-in selectable digital test pattern generation
  • Programmable clock and data alignment
Analog to Digital Converters
AD9233 IBIS Models
Data Sheets
Documentnote
AD9233: 12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-DIgital Converter Data Sheet (Rev. A)PDF 1232 kB
Application Notes
Documentnote
AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)
Software Download (zip, 21,702,560 bytes)		PDF 441 kB
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0)PDF 262 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD80141BCPZ-140 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)OTH 260-40 to 85C20.7217.61Y
AD9233BCPZ-105 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)OTH 260-40 to 85C27.0823.02Y
AD9233BCPZ-125 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)OTH 260-40 to 85C32.0927.27Y
AD9233BCPZ-80 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)OTH 260-40 to 85C19.8916.9Y
AD9233BCPZRL7-105 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)REEL 750-40 to 85C27.0823.02Y
AD9233BCPZRL7-125 Production48 ld LFCSP (7x7x.85mm w/4.1mm Pad)REEL 750-40 to 85C32.0927.27Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9233-105EBZEvaluation Board-1Y
AD9233-125EBZEvaluation Board202.4Y
AD9233-80EBZEvaluation Board200Y
AD9233：12位, 80 MSPS/105 MSPS/125 MSPS,18V模数转换器 数据手册 (Rev. A) ad9233
AD9233: 12-Bit, 80 MSPS/105 MSPS/125 MSPS, 1.8 V Analog-to-DIgital Converter Data Sheet (Rev. A) ad9233
AD9233CPS (Valid for All Speed Grades) ad9233
AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-812: 基于微控制器的串行端口接口(SPI®)启动电路 (Rev. 0) adg3304
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0) ad6655
Software Download (zip, 21,702,560 bytes) ad6655
AN-851: 一种WiMax双下变频IF采样接收机设计方案[中文版] (Rev. 0) ad9540
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0) ad9856
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
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