The AD9251 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use. A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/DATA timing and offset adjustments, and voltage reference modes. The AD9251 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9268 16-bit ADC, the AD9258 14-bit ADC, the AD9231 12-bit ADC, and the AD9204 10-bit ADC, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.
The AD9251 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS analog-to-digital converter (ADC). It features a high performance sample-andhold circuit and on-chip voltage reference.
The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 80 MSPS data rates and to guarantee no missing codes over the full operating temperature range.
The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.
The digital output data is presented in offset binary, gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Both 1.8 V and 3.3 V CMOS levels are supported and output data can be multiplexed onto a single output bus.
The AD9251 is available in a 64-lead RoHS Compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C).
Features and Benefits
| Analog to Digital ConvertersSecurity and Surveillance
AD9251 IBIS Models |
Document | note |
AD9251: 14-Bit, 20 MSPS/40 MSPS/65 MSPS/80 MSPS, 1.8 V Dual Analog-to-Digital Converter Data Sheet (Rev. B) | PDF 1.01 M |
Document | note |
UG-003: Evaluating the AD9650/AD9268/AD9258/AD9251/AD9231/AD9204 Analog-to-Digital Converters | PDF 2699 kB |
Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
---|---|---|---|---|---|---|
AD9251BCPZ-20 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 21.76 | 18.5 | Y |
AD9251BCPZ-40 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 28.1 | 23.89 | Y |
AD9251BCPZ-65 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 41.18 | 35 | Y |
AD9251BCPZ-80 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | OTH 260 | -40 to 85C | 44.12 | 37.5 | Y |
AD9251BCPZRL7-20 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 21.76 | 18.5 | Y |
AD9251BCPZRL7-40 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 28.1 | 23.89 | Y |
AD9251BCPZRL7-65 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 41.18 | 35 | Y |
AD9251BCPZRL7-80 Production | 64 ld LFCSP (9x9mm, 6.20mm exposed pad) | REEL 750 | -40 to 85C | 44.12 | 37.5 | Y |
Part Number | Description | Price | RoHS |
---|---|---|---|
AD9251-20EBZ | Evaluation Board | 200 | Y |
AD9251-40EBZ | Evaluation Board | 200 | Y |
AD9251-65EBZ | Evaluation Board | 200 | Y |
AD9251-80EBZ | Evaluation Board | 200 | Y |