AD9430 12-Bit, 170/210 MSPS 3.3 V A/D Converter

The AD9430 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates up to a 210 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and reference are included on the chip to provide a complete conversion solution.

The ADC requires a 3.3 V power supply and a differential ENCODE clock for full performance operation. The digital outputs are TTL/CMOS or LVDS compatible and support either twos complement or offset binary format. Separate output power supply pins support interfacing with 3.3 V or 2.5 V CMOS logic.

Two output buses support demultiplexed data up to 105 MSPS rates in CMOS mode. A data sync input is supported for proper output data port alignment in CMOS mode and a data clock output is available for proper output data timing. In LVDS mode, the chip provides data at the ENCODE clock rate.

Fabricated on an advanced BiCMOS process, the AD9430 is available in a 100-lead surface-mount plastic package (100 e-PAD TQFP) specified over the industrial temperature range (-40°C to +85°C).

Applications
  • Wireless and Wired Broadband Communications
  • Cable Reverse Path
  • Communications Test Equipment
  • Radar and Satellite Subsystems
  • Power Amplifier Linearization
Features and Benefits
  • SNR = 65 dB @ Fin up to 70 MHz @
    210 MSPS
  • ENOB of 10.6 @ Fin up to 70 MHz @
    210 MSPS
  • SFDR = 80 dBc @ Fin up to 70 MHz @
    210 MSPS
  • Excellent Linearity:
    DNL = ±0.3 LSB (Typical)
    INL = ±0.5 LSB (Typical)
  • Two Output Data Options:
    Demultiplexed 3.3 V CMOS Outputs Each @ 105 MSPS
    Interleaved or Parallel Data Output Option
    LVDS at 210 MSPS
  • 700 MHz Full Power Analog Bandwidth
  • Power Dissipation = 1.3 W Typical @ 210 MSPS
  • 1.5 V Input Voltage Range
  • 3.3 V Supply Operation
  • Output Data Format Option
  • Data Sync Input and Data Clock Output Provided
  • Clock Duty Cycle Stabilizer
Analog to Digital Converters
AD9430 IBIS Models
Data Sheets
Documentnote
AD9430: 12-Bit, 170/210 MSPS 3.3 V A/D Converter Data Sheet (Rev. E)PDF 1789 kB
Application Notes
Documentnote
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
AN-616: AD9430 Evaluation Board Modifications for XTAL Oscillator Clocking (Rev. 0)PDF 162 kB
AN-302: Exploit Digital Advantages in an SSB ReceiverPDF 417 kB
User Guides
Documentnote
UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ)PDF 774.6 K
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD80142BSVZ-200 Last Time Buy100 ld TQFP-ED(w/ 6.5mm exposed pad)OTH 90-40 to 85C00Y
AD9430BSVZ-170 Production100 ld TQFP-ED(w/ 6.5mm exposed pad)OTH 90-40 to 85C47.0539.97Y
AD9430BSVZ-210 Production100 ld TQFP-ED(w/ 6.5mm exposed pad)OTH 90-40 to 85C65.5155.66Y
Reference Materials
AD9430: 12-Bit, 170/210 MSPS 3.3 V A/D Converter Data Sheet (Rev. E) ad9430
AD9430 (All Speed Grades) ad9430
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0) ad6642
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-586: 高速模数转换器的LVDS数据输出[中文版] (Rev. 0) ad6642
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
AN-616: AD9430 Evaluation Board Modifications for XTAL Oscillator Clocking (Rev. 0) ad9430
AN-302: Exploit Digital Advantages in an SSB Receiver ad6600
UG-173: High Speed ADC USB FIFO Evaluation Kit (HSC-ADC-EVALB-DCZ) ad9220
MS-2210：高速ADC的电源设计 ad9861
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