High performance: Outstanding SFDR performance for multicarrier, multimode 3G and 4G cellular base station receivers. Ease of use: On-chip reference and track-and-hold. An output clock simplifies data capture. Packaged in a Pb-free, 100-lead TQFP/EP. Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths. OR (out-of-range) outputs indicate when the signal is beyond the selected input range.
The AD9445 is a 14-bit monolithic, sampling analog-to-digital converter (ADC) with an on-chip, IF sampling track-and-hold circuit and is optimized for power, small size, and ease of use. The product operates at up to an 105 MSPS conversion rate and is optimized for multi-carrier, multimode receivers, such as those found in cellular infrastructure equipment.
The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are LVDS-compatible (ANSI-644) or CMOS-compatible and include the means to reduce the overall current needed for short trace distances.
Optional features allow users to implement various selectable operating conditions, including data format select and output data mode.
The AD9445 is available in a 100-lead surface-mount plastic package (100-lead TQFP/EP) specified over the industrial temperature range (−40°C to +85°C).
Product Highlights
Features and Benefits
| Analog to Digital ConvertersAD9445 IBIS Models |
Document | note |
AD9445: 14-Bit, 105/125 MSPS, IF Sampling ADC Data Sheet (Rev. 0) | PDF 965 kB |
Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
---|---|---|---|---|---|---|
AD9445BSVZ-105 Production | 100 ld TQFP w/ 9.5mm exposed pad | OTH 90 | -40 to 85C | 48.82 | 41.49 | Y |
AD9445BSVZ-125 Production | 100 ld TQFP w/ 9.5mm exposed pad | OTH 90 | -40 to 85C | 65.48 | 55.66 | Y |