AD9460 16-Bit, 80 MSPS/105 MSPS ADC

True 16-bit linearity. High performance: outstanding SNR performance for baseband IFs in data acquisition, instrumentation, magnetic resonance imaging, and radar receivers. Ease of use: on-chip reference and high input impedance, track-and-hold with adjustable analog input range, and an output clock simplifies data capture. Packaged in a Pb-free, 100-lead TQFP/EP. Clock duty cycle stabilizer (DCS) maintains overall ADC performance over a wide range of clock pulse widths.Out-of-range (OR) outputs indicate when the signal is beyond the selected input range.

The AD9460 is a 16-bit, monolithic, sampling, analog-to-digital converter (ADC) with an on-chip track-and-hold circuit. It is optimized for performance, small size, and ease of use. The AD9460 operates up to 105 MSPS, providing a superior signal-to-noise ratio (SNR) for instrumentation, medical imaging, and radar receivers using baseband (<100 MHz) and IF frequencies.

The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. No external reference or driver components are required for many applications. Data outputs are CMOS or LVDS compatible (ANSI-644 compatible) and include the means to reduce the overall current needed for short trace distances.

Optional features allow users to implement various selectable operating conditions, including input range, data format select, and output data mode.

The AD9460 is available in a Pb-free, 100-lead, surface-mount, plastic package (TQFP_EP) specified over the industrial tem-perature range of −40°C to +85°C.

Product Highlights

Applications
  • MRI receivers
  • Multicarrier, multimode, cellular receivers
  • Antenna array positioning
  • Power amplifier linearization
  • Broadband wireless
  • Radar
  • Infrared imaging
  • Communications instrumentation
Features and Benefits
  • 105 MSPS guaranteed sampling rate (AD9460-105)
  • 79.4 dBFS SNR/91 dBc SFDR with 10 MHz input
    (3.4 V p-p input, 80 MSPS)
  • 78.3 dBFS SNR/ with 170 MHz input
    (4.0 V p-p input, 80 MSPS)
  • 77.8 dBFS SNR/87 dBc SFDR with 170 MHz input
    (3.4 V p-p input, 80 MSPS)
  • 77.2 dBFS SNR/84 dBc SFDR with 170 MHz input
    (3.4 V p-p input, 105 MSPS)
  • 90 dBFS two-tone SFDR with 139 MHz/140 MHz input
    (3.4 V p-p input, 105 MSPS)
  • 60 fsec rms jitter
  • Excellent linearity
    DNL = ±0.5 LSB typical
    INL = ±3.0 LSB typical
  • 2.0 V p-p to 4.0 V p-p differential full-scale input
  • Buffered analog inputs
  • LVDS outputs (ANSI-644 compatible) or CMOS outputs
  • Data format select (offset binary or twos complement)
Analog to Digital Converters
AD9460 IBIS Models
Data Sheets
Documentnote
AD9460: 16-Bit, 80/105 MSPS ADC Data Sheet (Rev. 0)PDF 1360 kB
Application Notes
Documentnote
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A)PDF 227 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9460BSVZ-105 Production100 ld TQFP w/ 9.5mm exposed padOTH 90-40 to 85C67.4757.35Y
AD9460BSVZ-80 Production100 ld TQFP w/ 9.5mm exposed padOTH 90-40 to 85C57.5448.91Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9460-105LVDSPCBZEvaluation Board-1Y
AD9460-80LVDS/PCBZEvaluation Board-1Y
Reference Materials
AD9460: 16-Bit, 80/105 MSPS ADC Data Sheet (Rev. 0) ad9460
AD9460BSV 3p3 LVDS and CMOS (All Speed Grades) ad9460
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-501: Aperture Uncertainty and ADC System Performance (Rev. A) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0) ad6642
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-586: 高速模数转换器的LVDS数据输出[中文版] (Rev. 0) ad6642
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-501: 孔径不确定度与ADC系统性能[中文版] (Rev. A) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
MS-2210：高速ADC的电源设计 ad9861
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