AD9525 Low Jitter Clock Generator Eight LVPECL Outputs

The AD9525 is designed to support converter clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs. Applications

The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on-chip PLL that can be used with an external VCO or VCXO. The VCO input and eight LVPECL outputs can operate up to a frequency of 3.6 GHz. All outputs share a common divider that can provide a division of 1 to 6.

The AD9525 offers a dedicated output that can be used to provide a programmable signal for resetting or synchronizing a data converter. The output signal is activated by a SPI write.

The AD9525 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply. The external VCXO or VCO can have an operating voltage of up to 5.5 V.

The AD9525 operates over the extended industrial temperature range of −40°C to +85°C.

Features and Benefits
  • Integrated ultra low noise synthesizer
  • 8 differential 3.6 GHz LVPECL outputs and 1 LVPECL or 2 CMOS SYNC Outputs
  • 2 differential reference inputs and 1 single-ended reference inputs
  • Clock & Timing
    IBIS Models
    Data Sheets
    Documentnote
    AD9525: Low Jitter Clock Generator with Eight LVPECL Outputs Data Sheet (Rev. A)PDF 1296 kB
    Order Information
    Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
    AD9525BCPZ Production48 ld LFCSP (7x7x.85mm w/5.1mm Pad) OTH 260-40 to 85C9.88.33Y
    AD9525BCPZ-REEL7 Production48 ld LFCSP (7x7x.85mm w/5.1mm Pad) REEL 750-40 to 85C08.33Y
    Evaluation Boards
    Part NumberDescriptionPriceRoHS
    AD9525/PCBZEvaluation Board, No VCO199Y
    AD9525/PCBZ-VCOEvaluation Board, 2950 MHz VCO Installed219Y
    Reference Materials
    AD9525: 8路LVPECL输出低抖动时钟发生器 (Rev. A) ad9525
    AD9525: Low Jitter Clock Generator with Eight LVPECL Outputs Data Sheet (Rev. A) ad9525
    AD9525 IBIS Models ad9525
    RF Source Booklet adf9010
    时钟宽带GSPS JESD204B ADC ad9525