AD9550 Integer-N Clock Translator for Wireline Communications
The AD9550 is a phase-locked loop (PLL) based clock translator
designed to address the needs of wireline communication
and base station applications. The device employs an integer-N
PLL to accommodate the applicable frequency translation
requirements. It accepts a single-ended input reference signal
at the REF input.
Applications
The AD9550 is pin programmable, providing a matrix of
standard input/output frequency translations from a list of
15 possible input frequencies to a list of 51 possible output
frequency pairs (OUT1 and OUT2).
The AD9550 output is compatible with LVPECL, LVDS, or
single-ended CMOS logic levels, although the AD9550 is
implemented in a strictly CMOS process.
The AD9550 operates over the extended industrial temperature
range of −40°C to +85°C.
Features and Benefits- Converts preset standard input frequencies to standard output frequencies
- Input frequencies from 8 kHz to 200 MHz
- Output frequencies up to 810 MHz LVPECL and LVDS (200 MHz CMOS)
- Preset pin-programmable frequency translation ratios
- On-chip VCO
- Single-ended CMOS reference input
- Two output clocks (independently programmable as LVDS, LVPECL, or CMOS)
- Single supply (3.3 V)
- Very low power: <450 mW (under most conditions)
- Small package size (5 mm × 5 mm)
- Exceeds Telcordia GR-253-CORE jitter generation, transfer and tolerance specifications
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Data Sheets
User Guides
Order Information
| Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
|---|
| AD9550BCPZ Production | 32 ld LFCSP (5x5mm) w/3.1mm exposed pad | OTH 490 | -40 to 85C | 4 | 3.4 | Y |
| AD9550BCPZ-REEL7 Production | 32 ld LFCSP (5x5mm) w/3.1mm exposed pad | REEL 1500 | -40 to 85C | 4 | 3.4 | Y |
Evaluation Boards
| Part Number | Description | Price | RoHS |
|---|
| AD9550/PCBZ | Evaluation Board | 190 | Y |
Reference Materials
