AD9626 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter

The AD9626 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates at up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution. ul { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:15px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;} ol { margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:25px; padding-top:0px; padding-right:0px; padding-bottom:10px; padding-left:0px;} li { padding-top:0px; padding-right:0px; padding-bottom:5px; padding-left:0px; margin-top:0px; margin-right:0px; margin-bottom:0px; margin-left:0px;} High Performance–Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input. Low Power–Consumes only 364 mW @ 250 MSPS. Ease of Use–CMOS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design. Serial Port Control–Standard serial port interface supports various product functions, such as data formatting, clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation. Pin-Compatible Family–10-bit pin-compatible family offered as the AD9601.

The ADC requires a 1.8 V analog voltage supply and a differential clock for full performance operation. The digital outputs are CMOS compatible and support either twos complement, offset binary format, or Gray code. A data clock output is available for proper output data timing.

Fabricated on an advanced CMOS process, the AD9626 is available in a 56-lead LFCSP, specified over the industrial temperature range (−40°C to +85°C).

Product Highlights
  • High Performance–Maintains 64.9 dBFS SNR @ 250 MSPS with a 70 MHz input.
  • Low Power–Consumes only 364 mW @ 250 MSPS.
  • Ease of Use–CMOS output data and output clock signal allow interface to current FPGA technology. The on-chip reference and sample-and-hold provide flexibility in system design. Use of a single 1.8 V supply simplifies system power supply design.
  • Serial Port Control–Standard serial port interface supports various product functions, such as data formatting, clock duty cycle stabilizer, power-down, gain adjust, and output test pattern generation.
  • Pin-Compatible Family–10-bit pin-compatible family offered as the AD9601.
Applications
  • Wireless and wired broadband communications
  • Cable reverse path
  • Communications test equipment
  • Radar and satellite subsystems
  • Power amplifier linearization
Features and Benefits
  • SNR = 64.8 dBFS @ fIN up to 70 MHz @
    250 MSPS
  • ENOB of 10.5 @ fIN up to 70 MHz @
    250 MSPS (−1.0 dBFS)
  • SFDR = 80 dBc @ fIN up to 70 MHz @
    250 MSPS (−1.0 dBFS)
  • Excellent Linearity
    DNL = ±0.3 LSB typical
    INL = ±0.7 LSB typical
  • CMOS outputs
    Single data port at up to 250 MHz
    Interleaved dual port @ 1/2 sample rate up to 125 MHz
  • 700 MHz full power analog bandwidth
  • On-chip reference, no external decoupling required
  • Integrated input buffer and track-and-hold
  • Low power dissipation
    272 mW @ 170 MSPS
    364 mW @ 250 MSPS
  • Programmable input voltage range
    1.0 V to 1.5 V, 1.25 V nominal
  • 1.8 V analog and digital supply operation
  • Selectable output data format (offset binary, twos complement, Gray code)
Analog to Digital Converters
AD9626 IBIS Models
Data Sheets
Documentnote
AD9626: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet (Rev. 0)PDF 1583 kB
Application Notes
Documentnote
AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0)PDF 207 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)
Software Download (zip, 21,702,560 bytes)		PDF 441 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD9626BCPZ-170 Production56 ld LFCSP (8x8mm, 4.3mm exposed pad)OTH 260-40 to 85C41.0834.91Y
AD9626BCPZ-210 Production56 ld LFCSP (8x8mm, 4.3mm exposed pad)OTH 260-40 to 85C49.4142Y
AD9626BCPZ-250 Production56 ld LFCSP (8x8mm, 4.3mm exposed pad)OTH 260-40 to 85C69.9559.46Y
AD9626BCPZRL7-210 Production56 ld LFCSP (8x8mm, 4.3mm exposed pad)REEL 750-40 to 85C49.4142Y
AD9626BCPZRL7-250 Production56 ld LFCSP (8x8mm, 4.3mm exposed pad)REEL 750-40 to 85C69.9559.46Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9626-250EBZEvaluation Board202.4Y
Reference Materials
AD9626: 12-Bit, 170 MSPS/210 MSPS/250 MSPS, 1.8 V Analog-to-Digital Converter Data Sheet (Rev. 0) ad9626
AD9626BCP (All Speeds) ad9626
AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-586: LVDS Outputs for High Speed A/D Converters (Rev. 0) ad6642
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-586: 高速模数转换器的LVDS数据输出[中文版] (Rev. 0) ad6642
AN-812: 基于微控制器的串行端口接口(SPI®)启动电路 (Rev. 0) adg3304
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0) ad6655
Software Download (zip, 21,702,560 bytes) ad6655
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
MS-2210：高速ADC的电源设计 ad9861
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