AD9635 Dual, 12-Bit, 80 MSPS/125 MSPS Serial LVDS 1.8 V Analog-to-Digital Converter
The AD9635 is a dual, 12-bit, 80 MSPS/125 MSPS analog-to-
digital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
Small Footprint. Two ADCs are contained in a small, spacesaving
package.
Low Power. The AD9635 uses 115 mW/channel at 125 MSPS with scalable power options.
Pin Compatibility with the AD9645, a 14-Bit Dual ADC.
Ease of Use. A data clock output (DCO) operates at
frequencies of up to 500 MHz and supports double data
rate (DDR) operation.
User Flexibility. The SPI control offers a wide range of
flexible features to meet specific system requirements.
The ADC requires a single 1.8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance
operation. No external reference or driver components are
required for many applications.
The ADC automatically multiplies the sample rate clock for the
appropriate LVDS serial data rate. A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for
signaling a new output byte are provided. Individual channel
power-down is supported; the AD9635 typically consumes less
than 2 mW in the full power-down state. The ADC provides
several features designed to maximize flexibility and minimize system cost, such as programmable output clock and data alignment and digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).
The AD9635 is available in a RoHS-compliant, 32-lead LFCSP. It is specified over the industrial temperature range of −40°C
to +85°C. This product is protected by a U.S. patent.
PRODUCT HIGHLIGHTS
- Small Footprint. Two ADCs are contained in a small, spacesaving
package.
- Low Power. The AD9635 uses 115 mW/channel at 125 MSPS with scalable power options.
- Pin Compatibility with the AD9645, a 14-Bit Dual ADC.
- Ease of Use. A data clock output (DCO) operates at
frequencies of up to 500 MHz and supports double data
rate (DDR) operation.
- User Flexibility. The SPI control offers a wide range of
flexible features to meet specific system requirements.
APPLICATIONS
- Communications
- Diversity radio systems
- Multimode digital receivers
GSM, EDGE, W-CDMA, LTE,
CDMA2000, WiMAX, TD-SCDMA
- I/Q demodulation systems
- Smart antenna systems
- Broadband data applications
- Battery-powered instruments
- Hand held scope meters
- Portable medical imaging and ultrasound
- Radar/LIDAR
Features and Benefits- 1.8 V supply operation
- Low power: 115 mW per channel at 125 MSPS with scalable power options
- SNR = 71 dBFS (to Nyquist)
- SFDR = 93 dBc at 70MHz
- DNL = -0.1 LSB to +0.2 LSB (typical);
INL = ±0.4 LSB (typical)
- Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
- 650 MHz full power analog bandwidth
- 2 V p-p input voltage range
- See data sheet for additional features
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Data Sheets
Application Notes
User Guides
Order Information
Part Number | Package | Packing Qty | Temp Range | Price 100-499 | Price 1000+ | RoHS |
---|
AD9635BCPZ-125 Production | 32 ld LFCSP (5x5x.75mm) w/3.6exposed pad | OTH 490 | -40 to 85C | 34.69 | 29.49 | Y |
AD9635BCPZ-80 Production | 32 ld LFCSP (5x5x.75mm) w/3.6exposed pad | OTH 490 | -40 to 85C | 21.99 | 18.69 | Y |
AD9635BCPZRL7-125 Production | 32 ld LFCSP (5x5x.75mm) w/3.6exposed pad | REEL 1500 | -40 to 85C | 34.69 | 29.49 | Y |
AD9635BCPZRL7-80 Production | 32 ld LFCSP (5x5x.75mm) w/3.6exposed pad | REEL 1500 | -40 to 85C | 21.99 | 18.69 | Y |
Evaluation Boards
Part Number | Description | Price | RoHS |
---|
AD9635-125EBZ | Evaluation Board | 300 | Y |
Reference Materials