AD9640 14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

The AD9640 is a dual 14-bit, 80/105/125/150 MSPS analog-to-digital converter (ADC). The AD9640 is designed to support communications applications where low cost, small size, and versatility are desired. Integrated dual 14-bit, 80/105/125/150 MSPS ADC. Fast overrange detect and signal monitor with serial output. Signal monitor block with dedicated serial output mode. Proprietary differential input that maintains excellent SNR performance for input frequencies up to 450 MHz. Operation from a single 1.8 V supply and a separate digital output driver supply to accommodate 1.8 V to 3.3 V logic families. A standard serial port interface that supports various product features and functions, such as data formatting (offset binary, twos complement, or gray coding), enabling the clock DCS, power-down, and voltage reference mode. Pin compatibility with the AD9627, AD9627-11, and the AD9600 for a simple migration from 14 bits to 12 bits, 11 bits, or 10 bits.

The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic. Each ADC features wide bandwidth differential sample-and-hold analog input amplifiers supporting a variety of user-selectable input ranges. An integrated voltage reference eases design considerations. A duty cycle stabilizer is provided to compen-sate for variations in the ADC clock duty cycle, allowing the converters to maintain excellent performance.

The AD9640 has several functions that simplify the automatic gain control (AGC) function in the system receiver. The fast detect feature allows fast overrange detection by outputting four bits of input level information with very short latency.

In addition, the programmable threshold detector allows moni-toring of the incoming signal power using the four fast detect bits of the ADC with very low latency. If the input signal level exceeds the programmable threshold, the fine upper threshold indicator goes high. Because this threshold is set from the four MSBs, the user can quickly turn down the system gain to avoid an overrange condition.

The second AGC-related function is the signal monitor. This block allows the user to monitor the composite magnitude of the incoming signal, which aids in setting the gain to optimize the dynamic range of the overall system.

The ADC output data can be routed directly to the two external 14-bit output ports. These outputs can be set from 1.8 V to 3.3 V CMOS or 1.8 V LVDS.

Flexible power-down options allow significant power savings, when desired.

Programming for setup and control is accomplished using a 3-bit SPI-compatible serial interface.

The AD9640 is available in a 64-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.

Product Highlights

Applications
  • Communications
  • Diversity radio systems
  • Multimode digital receivers GSM, EDGE, WCDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
  • I/Q demodulation systems
  • Smart antenna systems
  • General-purpose software radios
  • Broadband data applications
Features and Benefits
  • SNR = 71.8 dBc (72.8 dBFS) to 70 MHz @ 125 MSPS
  • SFDR = 85 dBc to 70 MHz @ 125 MSPS
  • Low power: 750 mW @ 125 MSPS
  • SNR = 71.6 dBc (72.6 dBFS) to 70 MHz @ 150 MSPS
  • SFDR = 84 dBc to 70 MHz @ 150 MSPS
  • Low power: 820 mW @ 150 MSPS
  • 1.8 V analog supply operation
  • 1.8 V to 3.3V CMOS output supply or 1.8 V LVDS output supply
  • Integer 1 to 8 input clock divider
  • IF sampling frequencies to 450 MHz
  • Internal ADC voltage reference
  • Integrated ADC sample-and-hold inputs
  • Flexible analog input range: 1 V p-p to 2 V p-p
  • Please see data sheet for additional features
Analog to Digital Converters
High Speed Signal Processing
  • Wideband RF Signal Processing Solutions
AD9640 IBIS Models
Data Sheets
Documentnote
AD9640: 14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter Data Sheet (Rev. B)PDF 1448 kB
Application Notes
Documentnote
AN-878: High Speed ADC SPI Control Software (Rev. A)PDF 585 kB
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0)PDF 2124 kB
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B)PDF 985 kB
AN-282: Fundamentals of Sampled Data SystemsPDF 2131 kB
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0)PDF 291.7 K
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0)PDF 203 kB
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0)PDF 363 kB
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B)PDF 401 kB
AN-345: Grounding for Low-and-High-Frequency CircuitsPDF 455 kB
AN-1234: Interfacing the ADL5534 Dual IF Gain Block to the AD9640 High Speed ADC (Rev. B)PDF 208 kB
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0)PDF 392 kB
AN-737: How ADIsimADC Models an ADC (Rev. B)PDF 373 kB
AN-807: Multicarrier WCDMA Feasibility (Rev. 0)PDF 969 kB
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0)PDF 1535 kB
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0)
Software Download (zip, 21,702,560 bytes)		PDF 441 kB
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0)PDF 262 kB
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0)PDF 370.2 K
AN-741: Little Known Characteristics of Phase Noise (Rev. 0)PDF 1679 kB
Product Highlight
Documentnote
Leading Inside Advertorials: Data Converter Function Can Help Solve Cost and Size Design Challenges in 3G and 4G Wireless InfrastructurePDF 94 kB
Order Information
Part NumberPackagePacking QtyTemp RangePrice 100-499Price 1000+RoHS
AD80192ABCPZ-155 Production64 ld LFCSP (9x9mm, 7.10 exposed pad)OTH 260-40 to 85C00Y
AD9640ABCPZ-105 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C73.2262.24Y
AD9640ABCPZ-125 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C87.5174.38Y
AD9640ABCPZ-150 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C116.0898.67Y
AD9640ABCPZ-80 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) OTH 260-40 to 85C44.6537.95Y
AD9640ABCPZRL7-105 Obsolete64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 75000Y
AD9640ABCPZRL7-125 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C87.5174.38Y
AD9640ABCPZRL7-80 Production64 ld LFCSP (9x9mm, 7.5mm exposed pad) REEL 750-40 to 85C44.6537.95Y
Evaluation Boards
Part NumberDescriptionPriceRoHS
AD9640-105EBZEvaluation Board202.4Y
AD9640-125EBZEvaluation Board202.4Y
AD9640-150EBZEvaluation Board202.4Y
AD9640-80EBZEvaluation Board202.4Y
Reference Materials
AD9640: 14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter Data Sheet (Rev. B) ad9640
AD9640CPZ (All Speed Grades) - 3.3V Outputs ad9640
AD9640CPZ (All Speed Grades) - 1.8V CMOS ad9640
AD9640CPZ (All Speed Grades) - 1.8V LVDS ad9640
AN-878: High Speed ADC SPI Control Software (Rev. A) ad6655
AN-808: CDMA2000多载波系统可行性研究 (Rev. 0) adl5330
AN-905: Visual Analog Converter Evaluation Tool Version 1.0 User Manual (Rev. 0) ad9220
AN-835: Understanding High Speed ADC Testing and Evaluation (Rev. B) ad9220
AN-282: Fundamentals of Sampled Data Systems ad1674
AN-756: Sampled Systems and the Effects of Clock Phase Noise and Jitter (Rev. 0) ad9220
AN-827: A Resonant Approach to Interfacing Amplifiers to Switched-Capacitor ADCs (Rev. 0) ad6655
AN-935: Designing an ADC Transformer-Coupled Front End (Rev. 0) ad9220
AN-742: Frequency Domain Response of Switched-Capacitor ADCs (Rev. B) ad7476
AN-345: Grounding for Low-and-High-Frequency Circuits ad9220
AN-835: 高速ADC测试和评估 (Rev. 0) ad9510
AN-1234: 双中频增益模块ADL5534与高速ADC AD9640的接口 (Rev. B) adl5534
AN-1234: Interfacing the ADL5534 Dual IF Gain Block to the AD9640 High Speed ADC (Rev. B) adl5534
AN-1142: 高速ADC PCB布局布线技巧 (Rev. 0) ad6655
AN-1142: Techniques for High Speed ADC PCB Layout (Rev. 0) ad6655
AN-878: 高速ADC SPI控制软件[中文版] (Rev. A) ad6655
AN-282: 采样数据系统基本原理[中文版] (Rev. A) ad75019
AN-737: 如何用ADIsimADC完成ADC建模 (Rev. B) ad6642
AN-737: How ADIsimADC Models an ADC (Rev. B) ad9220
AN-807: 多载波WCDMA的可行性 (Rev. 0) adf4106
AN-807: Multicarrier WCDMA Feasibility (Rev. 0) ad6655
AN-808: Multicarrier CDMA2000 Feasibility (Rev. 0) ad9863
AN-827: 放大器与开关电容ADC接口的匹配方法[中文版] (Rev. 0) ad8351
AN-905: VisualAnalog™转换器评估工具1.0版用户手册 (Rev. 0) ad6655
AN-935: ADC变压器耦合前端设计[中文版] (Rev. 0) ad6655
AN-812: 基于微控制器的串行端口接口(SPI®)启动电路 (Rev. 0) adg3304
AN-812: MicroController-Based Serial Port Interface (SPI) Boot Circuit (Rev. 0) ad6655
Software Download (zip, 21,702,560 bytes) ad6655
AN-851: 一种WiMax双下变频IF采样接收机设计方案[中文版] (Rev. 0) ad9540
AN-851: A WiMax Double Downconversion IF Sampling Receiver Design (Rev. 0) ad9856
AN-715: 走近IBIS模型：什么是IBIS模型？它们是如何生成的？ (Rev. 0) ad6655
AN-715: A First Approach to IBIS Models: What They Are and How They Are Generated (Rev. 0) ad9220
AN-345: 低频和高频电路接地 ad9540
AN-756: 系统采样以及时钟相位噪声和抖动的影响[中文版] (Rev. 0) ad9540
AN-741: Little Known Characteristics of Phase Noise (Rev. 0) ad9221
AN-741: 鲜为人知的相位噪声特性 ad9540
Leading Inside Advertorials: Data Converter Function Can Help Solve Cost and Size Design Challenges in 3G and 4G Wireless Infras ad9640
CN-0049 adl5534
MS-2210：高速ADC的电源设计 ad9861
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