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ADF4212 Dual, Integer-N 0.5 GHz / 3.0 GHz PLL

The ADF4210/ADF4211/ADF4212/ADF4213 is a dual frequency synthesizer which can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They can provide the LO for both the RF and IF sections. They consist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (6-bit) and B (12-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N= BP+A). In addition, the 15-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizers are used with an external loop filter and VCO's (Voltage Controlled Oscillators) Control of all the on-chip registers is via a simple 3-wire interface. The devices operate with a 3V ( ± 10%) or 5V( ± 10%) power supply and can be powered down when not in use.

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Reference Materials

• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 1
• Technical Articles：Phase-Locked Loops for High-Frequency Receivers and Transmitters - Part 2
• Technical Articles：Phase Locked Loops for High-Frequency Receivers and Transmitters – Part 3