FAN5903: Buck Converter with Bypass Mode for 3G/3.5G and 4G PAs

FAN5903 is a high-efficiency, low-noise, synchronous, step-down, DC-DC converter designed for powering 3G/3.5G/4G RF Power Amplifiers (PAs) in handsets and other mobile applications.

The output voltage may be dynamically varied from 0.40 V to 3.50 V, proportional to an analog input VCON, ranging from 0.16 V to 1.40 V provided by an external DAC. This allows the PA to be supplied with the voltage that enables maximum power-added efficiency.

An integrated bypass FET automatically switches on when battery voltage drops close to the desired output voltage (VOUT=VBAT-200 mV). The DC-DC switches back to Synchronous Mode when the voltage dropout exceeds 375 mV. The integrated bypass FET is also enabled when VCON is nominally greater than to 1.5V.

The FAN5903 offers fast transition times, enabling changes to the output voltage in less than 10µs for power transitions. Moreover, a Current-Mode control loop with fast transient response ensures excellent line and load regulation.

Light-load efficiency is optimized by operating in PFM Mode for load currents typically less than 100mA.

The switching frequency may be set to 3 MHz or 6 MHz, enabling further optimization of system performance. The FAN5903 typically uses a single, small-form-factor inductor of 540nH. Efficiency may be further optimized using a 1.0 µH inductor when running at 3 MHz.

When output regulation is not required, the FAN5903 may be placed in Sleep Mode by setting VCON nominally to 50 mV. This ensures a very low IQ (< 70 µA) while enabling a fast return to output regulation. The FAN5903 enables significant current reduction and increased talk time and is available in a 1.34 mm x 1.29 mm, 9-bump, 0.40 mm-pitch, WLCSP package.

Features

• 2.7 V to 5.5 V Input Voltage Range
• V_OUT Range from 0.4 V to 3.5 V (or V_IN)
• Small Form Factor Inductor
  • 2012 540 nH for Minimal PCB Area
  • 2520 1.0 µH for Higher Efficiency
• 2012 540 nH for Minimal PCB Area
• 2520 1.0 µH for Higher Efficiency
• Bypass Dropout at 500 mA, 60 mV Typical
• 100% Duty Cycle for Low Dropout Operation
• Input Under-Voltage Lockout / Thermal Shutdown
• 1.34 mm x 1.29 mm, 9-Bump, 0.4 mm-Pitch WLCSP
• 3 MHz / 6 MHz Selectable Switching Frequency to Facilitate System Optimization
• High-Efficiency PFM Operation at Low Power
• Sleep Mode for Very Low IQ Operation
• Up to 96% Efficient Synchronous Operation at High-Power Conditions
• 10 µs Output Voltage Step Response for Early Power Loop Settling