FDD850N10L: N-Channel Logic Level PowerTrench® MOSFET 100V, 15.7A, 75mΩ _ BDTIC a Leading Distributor in China

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FDD850N10L: N-Channel Logic Level PowerTrench® MOSFET 100V, 15.7A, 75mΩ

This N-Channel MOSFET is produced using Fairchild Semiconductor’s PowerTrench® process that has been tailored to minimize the on-state resistance while maintaining superior switching performance.

FDD850N10L Datasheet

Features

R_DS(on) = 61mΩ ( Typ.) @ V_GS = 10V, I_D= 12A
R_DS(on) = 64mΩ ( Typ.) @ V_GS = 5V, I_D = 12A
Low Gate Charge ( Typ. 22.2nC)
Low C_rss ( Typ. 42pF)
Fast Switching
100% Avalanche Tested
Improve dv/dt Capability
RoHS Compliant

**Ordering Code**
Product	Product & Eco Status	Unit Price/1K Order	Packing Method Convention	Package Marking Convention*
FDD850N10L	Full Production Green as of Aug 2010 China RoHS	$0.5184	TO-252 3L (DPAK) - 2.285 x 6.54 x 9.905mm, TAPE REEL TO-252 3L (DPAK) Drawing Last Update: Jun 2016 TO252-3L, JEDEC OPTION AA REEL PACKING DRAWING Last Update: Oct 2016 TO252-3L, PACKING DRAWING Last Update: May 2013 TO252-3L packing drawing Last Update: May 2013	Line 1$Y (Fairchild logo) &Z (Plant Code) &3 (3-Digit Date Code) &K Line 2FDD Line 3850N10L

Application Notes

AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014

AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011

AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011

AN-9010 MOSFET Basics Last Update : 09-Sep-2013

AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014

AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011

AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011

AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016

AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014

Datasheet: FDD850N10L.pdf














Other: Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014; Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016; A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011; A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011; A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011; Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014; MOSFET Basics Last Update : 09-Sep-2013; Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011; FRFET® in Synchronous Rectification Last Update : 28-Jun-2014; TO252-3L, JEDEC OPTION AA REEL PACKING DRAWING Last Update: Oct 2016; TO252-3L, PACKING DRAWING Last Update: May 2013; TO252-3L packing drawing Last Update: May 2013; TO-252 3L (DPAK) Drawing Last Update: Jun 2016

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