FDN337N: N-Channel Logic-Level Enhancement Mode Field Effect Transistor
SuperSOT™-3 N-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications in notebook computers, portable phones, PCMCIA cards, and other battery powered circuits where fast switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
- 2.2 A, 30 V, RDS(ON) = 0.065 Ω @ VGS = 4.5 V, RDS(ON) = 0.082 Ω @ VGS = 2.5 V.
- Industry standard outline SOT-23 surface mount package using proprietary SuperSOT™-3 design for superior thermal and electrical capabilities.
- High density cell design for extremely low RDS(ON).
- Exceptional on-resistance and maximum DC current capability.
Ordering CodeProduct | Product & Eco Status | Unit Price/1K Order | Packing Method Convention | Package Marking Convention* |
---|
FDN337N | Full Production
Green as of Dec 2011
China RoHS | $0.1005 | SSOT 3L
-
1.12 x 2.92 x 1.4mm,
TAPE REEL | Line 1&E (Space) &Y (Binary Calendar Year Coding)
Line 2337&E (Space) &G (Weekly Date Code)
|
Application Notes
AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011AN-9010 MOSFET Basics Last Update : 09-Sep-2013AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014