FIN1028: 3.3V LVDS 2-Bit High Speed Differential Receiver

This dual receiver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The receiver translates LVDS levels, with a typical differential input threshold of 100mV, to LVTTL signal levels. LVDS provides low EMI at ultra-low power dissipation, even at high frequencies. This device is ideal for high-speed transfer of clock and data signals. The FIN1028 can be paired with its companion driver, the FIN1027, or any other LVDS driver.

Features

• Greater than 400Mbs data rate
• 3.3V power supply operation
• 0.4ns maximum differential pulse skew
• 2.5ns maximum propagation delay
• Low power dissipation
• Power-Off protection
• Fail safe protection for open-circuit, shorted and terminated conditions
• Meets or exceeds the TIA/EIA-644 LVDS standard
• Flow-through pinout simplifies PCB layout

Application Notes