FIN3385: Low Voltage, 28-Bit, Flat-Panel Display Link Serializer / Deserializer
The FIN3385 and FIN3386 transform 28-bit wide parallel Low-Voltage TTL (LVTTL) data into four serial Low Voltage Differential Signaling (LVDS) data streams. A phase-locked transmit clock is transmitted in parallel with the data stream over a separate LVDS link. Every cycle of transmit clock, 28-bits of input LVTTL data are sampled and transmitted.
The FIN3386 receives and converts the 4/3 serial LVDS data streams back into 28/21 bits of LVTTL data, acting as the deserializer.
For the FIN3385, at a transmit clock frequency of 85MHz, 28-bits of LVTTL data are transmitted at a rate of 595Mbps per LVDS channel.
This pair solves EMI and cable size problems associated with wide and high-speed TTL interfaces.
Ordering CodeProduct | Product & Eco Status | Unit Price/1K Order | Packing Method Convention | Package Marking Convention* |
---|
FIN3385MTDX | Full Production
Green as of May 2012
China RoHS | $3.12 | TSSOP 56L
-
1.1 x 6.1 x 14mm,
TAPE REEL | Line 1$Y (Fairchild logo) &Z (Plant Code) &2 (2-Digit Date Code) &K
Line 2FIN3385
|
Application Notes
AN-5017 LVDS Fundamentals Last Update : 03-Mar-2011AN-5019 LVDS: Calculating Driver/Receiver Power Last Update : 03-Mar-2011AN-5023 LVDS Compatibility with RS422 and RS485 Interface Standards Last Update : 03-Mar-2011AN-5059 LVDS Technology Solves Typical EMI Problems Associated with Cell Phone Cameras and Displays Last Update : 03-Mar-2011AN-5020 LVDS Reduces EMI Last Update : 03-Mar-2011