IRL640A: 200V N-Channel Logic Level A-FET / Substitute of IRL640 _ BDTIC a Leading Distributor in China

IRL640A: 200V N-Channel Logic Level A-FET / Substitute of IRL640

IRL640A Datasheet

Features

Logic-Level Gate Drive
Avalanche Rugged Technology
Rugged Gate Oxide Technology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current: 10µA (Max.) @ V_DS = 200V
Lower R_DS(ON): 0.145Ω (Typ.)

**Ordering Code**
Product	Product & Eco Status	Unit Price/1K Order	Packing Method Convention	Package Marking Convention*
IRL640A	Full Production ROHS Compliant as of 27-Feb-2006 China RoHS	$0.8964	TO-220 3L - 4.83 x 10.16 x 8.89mm, RAIL TO-220 3L Drawing Last Update: Nov 2015 TO220-3L, JEDEC VARIATION, PACKING DRAWING Last Update: Oct 2013 TO Tube Packing Drawing Last Update: Sep 2015 TO Vacuum Packing Drawing Last Update: Sep 2015	Line 1$Y (Fairchild logo) Line 2&3 (3-Digit Date Code) &K Line 3IRL640A

Application Notes

AN-4163 Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014

AN-9034 Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011

AN-7510 A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011

AN-9010 MOSFET Basics Last Update : 09-Sep-2013

AN-9065 FRFET® in Synchronous Rectification Last Update : 28-Jun-2014

AN-7515 A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011

AN-7533 A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011

AN-558 Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016

AN-9005 Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014

MOSFET Basics Last Update : 09-Sep-2013

A Combined Single-Pulse and Repetitive UIS Rating System Last Update : 03-Mar-2011

FRFET® in Synchronous Rectification Last Update : 28-Jun-2014

Driving and Layout Design for Fast Switching Super-Junction MOSFETs Last Update : 26-Nov-2014

Power MOSFET Avalanche Guideline Last Update : 05-Mar-2011

TO-220 3L Drawing Last Update: Nov 2015

TO220-3L, JEDEC VARIATION, PACKING DRAWING Last Update: Oct 2013

TO Tube Packing Drawing Last Update: Sep 2015

TO Vacuum Packing Drawing Last Update: Sep 2015

A New PSPICE Subcircuit for the Power MOSFET Featuring Global Temperature Options Last Update : 05-Mar-2011

A Revised MOSFET Model With Dynamic Temperature Compensation Last Update : 05-Mar-2011

Shielded Gate PowerTrench® MOSFET Datasheet Explanation Last Update : 23-Oct-2014

Introduction to Power MOSFETs and their Applications Last Update : 29-Mar-2016

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