X5169: CPU Supervisor with 16Kbit SPI EEPROM

These devices combine three popular functions, Power-on Reset Control, Supply Voltage Supervision, and Block Lock Protect Serial EEPROM Memory in one package. This combination lowers system cost, reduces board space requirements, and increases reliability.

Applying power to the device activates the power-on reset circuit which holds RESET/RESET active for a period of time. This allows the power supply and oscillator to stabilize before the processor can execute code.

The device's low VCC detection circuitry protects the user's system from low voltage conditions by holding RESET/RESET active when VCC falls below a minimum VCC trip point. RESET/RESET remains asserted until VCC returns to proper operating level and stabilizes. Five industry standard VTRIP thresholds are available, however, Intersil's unique circuits allow the threshold to be reprogrammed to meet custom requirements or to fine-tune the threshold in applications requiring higher precision.

Key Features
  • Low VCC Detection and Reset Assertion
    • Five standard reset threshold voltages
    • Re-program low VCC reset threshold voltage using special programming sequence
    • Reset signal valid to VCC = 1V
  • Long Battery Life with Low Power Consumption
    • <50µA max standby current, watchdog on
    • <1µA max standby current, watchdog off
    • <400µA max active current during read
  • 16Kbits of EEPROM
  • Built-in Inadvertent Write Protection
    • Power-up/power-down protection circuitry
    • Protect 0, 1/4, 1/2 or all of EEPROM array with Block Lock™ protection
    • In circuit programmable ROM mode
  • 2MHz SPI Interface Modes (0,0 & 1,1)
  • Minimize EEPROM Programming Time
    • 32-byte page write mode
    • Self-timed write cycle
    • 5ms write cycle time (typical)
  • 2.7V to 5.5V and 4.5V to 5.5V Power Supply Operation
  • Available Packages
    • 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
  • Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
  • Low VCC Detection and Reset Assertion
    • Five standard reset threshold voltages
    • Re-program low VCC reset threshold voltage using special programming sequence
    • Reset signal valid to VCC = 1V
  • Long Battery Life with Low Power Consumption
    • <50µA max standby current, watchdog on
    • <1µA max standby current, watchdog off
    • <400µA max active current during read
  • 16Kbits of EEPROM
  • Built-in Inadvertent Write Protection
    • Power-up/power-down protection circuitry
    • Protect 0, 1/4, 1/2 or all of EEPROM array with Block Lock™ protection
    • In circuit programmable ROM mode
  • 2MHz SPI Interface Modes (0,0 & 1,1)
  • Minimize EEPROM Programming Time
    • 32-byte page write mode
    • Self-timed write cycle
    • 5ms write cycle time (typical)
  • 2.7V to 5.5V and 4.5V to 5.5V Power Supply Operation
  • Available Packages
    • 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
  • Pb-Free Plus Anneal Available (RoHS Compliant)
Typical Diagram
Application Notes
TitleTypeUpdatedSizeOther Languages
AN1143: Designing with Intersil's X5000 Series CPU SupervisorsPDF13 Nov 2014109 KB
Datasheets
TitleTypeUpdatedSizeOther Languages
X5168, X5169 DatasheetPDF29 Jul 2015378 KB
White Papers
TitleTypeUpdatedSizeOther Languages
Five Easy Steps to Create a Multi-Load Power SolutionPDF30 Jan 2017502 KB
Order Information
Part NumberPackage TypeWeight(g)PinsMSL RatingPeak Temp (°C)RoHS Status
X5169P8 Ld PDIP0.548N/ANA
X5169P-2.78 Ld PDIP0.548N/ANA
X5169P-2.7A8 Ld PDIP0.548N/ANA
X5169P-4.5A8 Ld PDIP0.548N/ANA
X5169PI8 Ld PDIP0.548N/ANA
X5169PI-2.78 Ld PDIP0.548N/ANA
X5169PI-2.7A8 Ld PDIP0.548N/ANA
X5169PI-4.5A8 Ld PDIP0.548N/ANA
X5169PIZ8 Ld PDIP0.548N/ANARoHS
X5169PIZ-2.78 Ld PDIP0.548N/ANARoHS
X5169PIZ-2.7A8 Ld PDIP0.548N/ANARoHS
X5169PIZ-4.5A8 Ld PDIP0.548N/ANARoHS
X5169PZ8 Ld PDIP0.548N/ANARoHS
X5169PZ-2.78 Ld PDIP0.548N/ANARoHS
X5169PZ-2.7A8 Ld PDIP0.548N/ANARoHS
X5169PZ-4.5A8 Ld PDIP0.548N/ANARoHS
X5169S88 Ld SOIC0.0728240
X5169S8-2.78 Ld SOIC0.0728240
X5169S8-2.7A8 Ld SOIC0.0728240
X5169S8-2.7T18 Ld SOIC T+R0.0728240
X5169S8-4.5A8 Ld SOIC0.0728240
X5169S8I8 Ld SOIC0.0728240
X5169S8I-2.78 Ld SOIC0.0728240
X5169S8I-2.7A8 Ld SOIC0.0728240
X5169S8I-2.7T18 Ld SOIC T+R0.0728240
X5169S8I-4.5A8 Ld SOIC0.0728240
X5169S8IT18 Ld SOIC T+R0.0728240
X5169S8IZ8 Ld SOIC0.0728260RoHS
X5169S8IZ-2.78 Ld SOIC0.0728260RoHS
X5169S8IZ-2.7A8 Ld SOIC0.0728260RoHS
X5169S8IZ-2.7T18 Ld SOIC T+R0.0728260RoHS
X5169S8IZ-4.5A8 Ld SOIC0.0728260RoHS
X5169S8IZT18 Ld SOIC T+R0.0728260RoHS
X5169S8T18 Ld SOIC T+R0.0728240
X5169S8Z8 Ld SOIC0.0728260RoHS
X5169S8Z-2.78 Ld SOIC0.0728260RoHS
X5169S8Z-2.7A8 Ld SOIC0.0728260RoHS
X5169S8Z-2.7T18 Ld SOIC T+R0.0728260RoHS
X5169S8Z-4.5A8 Ld SOIC0.0728260RoHS
X5169S8ZT18 Ld SOIC T+R0.0728260RoHS
X5169V1414 Ld TSSOP0.05414240
X5169V14-2.714 Ld TSSOP0.05414240
X5169V14-2.7A14 Ld TSSOP0.05414240
X5169V14-2.7T114 Ld TSSOP T+R0.05414240
X5169V14-4.5A14 Ld TSSOP0.05414240
X5169V14I14 Ld TSSOP0.05414240
X5169V14I-2.714 Ld TSSOP0.05414240
X5169V14I-2.7A14 Ld TSSOP0.05414240
X5169V14I-2.7T114 Ld TSSOP T+R0.05414240
X5169V14I-4.5A14 Ld TSSOP0.05414240
X5169V14IT114 Ld TSSOP T+R0.05414240
X5169V14IZ14 Ld TSSOP0.05414260RoHS
X5169V14IZ-2.714 Ld TSSOP0.05414260RoHS
X5169V14IZ-2.7A14 Ld TSSOP0.05414260RoHS
X5169V14IZ-2.7T114 Ld TSSOP T+R0.05414260RoHS
X5169V14IZ-4.5A14 Ld TSSOP0.05414260RoHS
X5169V14IZT114 Ld TSSOP T+R0.05414260RoHS
X5169V14T114 Ld TSSOP T+R0.05414240
X5169V14Z14 Ld TSSOP0.05414260RoHS
X5169V14Z-2.714 Ld TSSOP0.05414260RoHS
X5169V14Z-2.7A14 Ld TSSOP0.05414260RoHS
X5169V14Z-2.7T114 Ld TSSOP T+R0.05414260RoHS
X5169V14Z-4.5A14 Ld TSSOP0.05414260RoHS
X5169V14ZT114 Ld TSSOP T+R0.05414260RoHS
X5168, X5169 Datasheet 29 Jul 2015
AN1143: Designing with Intersil's X5000 Series CPU Supervisors 13 Nov 2014
Five Easy Steps to Create a Multi-Load Power Solution 30 Jan 2017