Typical DC specs include ±0.4LSB INL, ±0.2LSB DNL. The transition noise is a low 0.32LSBRMS.
A single 3V supply allows low power operation. A separate output supply allows the outputs to drive 0.5V to 3.6V logic.
A single-ended CLK input controls converter operation. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. A data ready output clock (CLKOUT) can be used to latch the output data.
Part Number | Package | Temp | Price(1-99) | Price (1k)* |
---|---|---|---|---|
LTC2283CUP#PBF | 9x9 QFN-64 | C | $58.93 | $41.25 |
LTC2283CUP#TRPBF | 9x9 QFN-64 | C | $41.35 | |
LTC2283IUP#PBF | 9x9 QFN-64 | I | $70.71 | $49.50 |
LTC2283IUP#TRPBF | 9x9 QFN-64 | I | $49.60 |
Part Number | Description | Price |
---|---|---|
DC1098A-B | LTC2283IUP | Dual HSADC, VDD = +3V, 125Msps 12-Bit 1MHz < Ain < 70MHz, (req. DC890) | $200.00 |
DC1098A-E | LTC2283IUP | Dual HSADC, VDD = +3V, 125Msps 12-Bit 70MHz < Ain < 140MHz, (req. DC890) | $200.00 |
Part Number | Description | Price |
---|---|---|
DC890B | USB Data Acquisition Controller, for PScope Evaluation Kits (up to 250Mbps, CMOS/LVDS) | $300.00 |